Datasheet

2011 Microchip Technology Inc. Preliminary DS41576B-page 9
PIC12F752/HV752
1.0 DEVICE OVERVIEW
The PIC12F752/HV752 devices are covered by this
data sheet. They are available in 8-pin PDIP, SOIC and
DFN packages.
Block Diagrams and pinout descriptions of the devices
are in Figure 1-1 and Table 1-1.
FIGURE 1-1: PIC12F752/HV752 BLOCK DIAGRAM
Flash
Program
Memory
13
Data Bus
8
14
Program
Bus
Instruction Reg
Program Counter
RAM
File
Registers
Direct Addr
7
RAM Addr
9
Addr MUX
Indirect
Addr
FSR Reg
STATUS Reg
MUX
ALU
W Reg
Instruction
Decode &
Control
Timing
Generation
CLKIN
CLKOUT
PORTA
8
8
8
3
8-Level Stack
64 Bytes
1K X 14
(13-Bit)
Power-up
Timer
Power-on
Reset
Watchdog
Timer
MCLR
VSS
Brown-out
Reset
Timer0 Timer1
RA0
RA1
RA2
RA3
RA4
RA5
Analog Comparator
T0CKI
INT
T1CKI
Configuration
Internal
Oscillator
and Reference
T1G
VDD
Block
C1IN0+/C2IN0+
C1IN0-/C2IN0-
C1IN1-
C2IN1-
C1OUT/C2OUT
Shunt Regulator
(PIC12HV752 only)
Capture/
Compare/
PWM
(CCP)
Hardware
Limit
Timer1
(HLT)
Complementary
Output
Generator
(COG)
Timer2
Fixed Voltage
Reference
(FVR)
Dual Range
DAC