Datasheet

 2011 Microchip Technology Inc. Preliminary DS41576B-page 51
PIC12F752/HV752
REGISTER 5-7: SLRCONA: SLEW RATE CONTROL REGISTER
U-0 U-0 U-0 U-0 U-0 R/W-0 U-0 R/W-0
— — — — —SLRA2 —SLRA0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-3 Unimplemented: Read as ‘0’
bit 2 SLRA2: Slew Rate Control bit
1 = Pin voltage slews at limited rate
0 = Pin voltage slews at maximum rate
bit 1 Unimplemented: Read as ‘0’
bit 0 SLRA0: Slew Rate Control bit
1 = Pin voltage slews at limited rate
0 = Pin voltage slews at maximum rate
Note 1: Global RAPU
must be enabled for individual pull-ups to be enabled.
2: The weak pull-up device is automatically disabled if the pin is in Output mode (TRISA = 0).
3: The RA3 pull-up is enabled when configured as MCLR in the Configuration Word, otherwise it is disabled
as an input and reads as ‘0’.