Datasheet

 2011 Microchip Technology Inc. Preliminary DS41576B-page 13
PIC12F752/HV752
FIGURE 2-2: DATA MEMORY MAP OF THE PIC12F752/HV752
Legend: = Unimplemented data memory locations, read as ‘0’.
BANK 0 BANK 1 BANK 2 BANK 3
INDF 00h INDF 80h INDF 100h INDF 180h
TMR0 01h OPTION_REG 81h TMR0 101h OPTION_REG 181h
PCL 02h PCL 82h PCL 102h PCL 182h
STATUS 03h STATUS 83h STATUS 103h STATUS 183h
FSR 04h FSR 84h FSR 104h FSR 184h
PORTA 05h TRISA 85h LATA 105h ANSELA 185h
— 06h — 86h — 106h — 186h
— 07h — 87h — 107h — 187h
IOCAF 08h IOCAP 88h IOCAN 108h APFCON 188h
— 09h — 89h — 109h OSCTUNE 189h
PCLATH 0Ah PCLATH 8Ah PCLATH 10Ah PCLATH 18Ah
INTCON 0Bh INTCON 8Bh INTCON 10Bh INTCON 18Bh
PIR1 0Ch PIE1 8Ch WPUA 10Ch
PMCON1 18Ch
PIR2 0Dh PIE2 8Dh SLRCONA 10Dh PMCON2 18Dh
—0Eh —8Eh — 10Eh PMADRL 18Eh
TMR1L 0Fh OSCCON 8Fh PCON 10Fh PMADRH 18Fh
TMR1H 10h FVRCON 90h TMR2 110h PMDATL 190h
T1CON 11h DACCON0 91h
PR2 111h PMDATH 191h
T1GCON 12h DACCON1 92h T2CON 112h COG1PH 192h
CCPR1L 13h — 93h HLTMR1 113h COG1BLK 193h
CCPR1H 14h
— 94h HLTPR1 114h COG1DB 194h
CCP1CON 15h — 95h HLT1CON0 115h COG1CON0 195h
— 16h — 96h HLT1CON1 116h COG1CON1 196h
— 17h — 97h — 117h COG1ASD 197h
— 18h — 98h — 118h — 198h
— 19h — 99h — 119h — 199h
—1Ah —9Ah —11Ah — 19Ah
— 1Bh CM2CON0 9Bh —11Bh — 19Bh
ADRESL 1Ch CM2CON1 9Ch
—11Ch — 19Ch
ADRESH 1Dh CM1CON0 9Dh —11Dh — 19Dh
ADCON0 1Eh CM1CON1 9Eh —11Eh — 19Eh
ADCON1 1Fh CMOUT 9Fh
—11Fh — 19Fh
Unimplemented
20h
3Fh
Unimplemented
A0h
EFh
Unimplemented
120h
16Fh
Unimplemented
1A0h
1EFh
General
Purpose
Register
48 Bytes
40h
6Fh
Common RAM
16 Bytes
70h
7Fh
Common RAM
(Accesses
70h-7Fh)
F0h
FFh
Common RAM
(Accesses
70h-7Fh)
170h
17Fh
Common RAM
(Accesses
70h-7Fh)
1F0h
1FFh