Datasheet

 2011 Microchip Technology Inc. Preliminary DS41576B-page 95

PIC12F752/HV752

11.13 COG Control Registers

R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0

GxEN GxOE1 GxOE0 GxPOL1 GxPOL0 GxLD GxCS<1:0>

bit 7 bit 0

Legend:

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set ‘0’ = Bit is cleared q = Value depends on condition

bit 7 GxEN: COGx Enable bit

1 = Module is enabled

0 = Module is disabled

bit 6 GxOE1: COGxOUT1 Output Enable bit

1 = COGxOUT1 is available on associated I/O pin

0 = COGxOUT1 is not available on associated I/O pin

bit 5 GxOE0: COGxOUT0 Output Enable bit

1 = COGxOUT0 is available on associated I/O pin

0 = COGxOUT0 is not available on associated I/O pin

bit 4 GxPOL1: COGxOUT1 Output Polarity bit

1 = Output is inverted polarity

0 = Output is normal polarity

bit 3 GxPOL0: COGxOUT0 Output Polarity bit

1 = Output is inverted polarity

0 = Output is normal polarity

bit 2 GxLD: COGx Load Buffers bit

1 = Phase, blanking, and dead-band buffers to be loaded with register values on next input events

0 = Register to buffer transfer is complete

bit 1-0 GxCS<1:0>: COGx Clock Source Select bits

11 = Reserved

10 = 8 MHz HFINTOSC clock

01 = Instruction clock (Fosc/4)

00 = System clock (Fosc)