Datasheet

 2011 Microchip Technology Inc. Preliminary DS41576B-page 89
PIC12F752/HV752
11.4 Output Control
Immediately after the COG module is enabled, the
complementary drive is configured with COGxOUT0
drive cleared and COGxOUT1 drive active.
11.4.1 OUTPUT ENABLES
Each COG output pin has individual output enable
controls. Output enables are selected with the GxOE0
and GxOE1 bits of the COGxCON0 register. When an
output enable control is cleared, the module asserts
no control over the pin. When an output enable is set,
the override value or active PWM waveform is applied
to the pin per the port priority selection.
The output pin enables are independent of the module
enable bit, GxEN. When GxEN is cleared, the
shutdown override levels are present on the COG
output pins for which the output enables are active.
11.4.2 POLARITY CONTROL
The polarity of each COG output can be selected
independently. When the output polarity bit is set, the
corresponding output is active low. Clearing the output
polarity bit configures the corresponding output as
active high. However, polarity does not affect the
override levels.
Output polarity is selected with the GxPOL0 and
GxPOL1 bits of the COGxCON0 register.
11.5 Dead-Band Control
The dead-band control provides for non-overlapping
PWM output signals to prevent shoot through current
in the external power switches.
The COG contains two 4-bit dead-band counters. One
dead-band counter is used for rising event dead-band
control. The other is used for falling event dead-band
control.
Dead band is timed by counting COG_clock periods
from zero up to the value in the dead-band count
register. Use Equation 11-1 to calculate dead-band
times.
11.5.1 RISING EVENT DEAD BAND
Rising event dead-band delays the turn-on of
COGxOUT0 from when COGxOUT1 is turned off. The
rising event dead-band time starts when the rising
event output goes true.
The rising event output into the dead-band counter
may be delayed by the phase delay. When the phase
delay time is zero, the rising event output goes true
coincident with the unblanked rising input event. When
the phase delay time is not zero, the rising event out-
put goes true at the completion of the phase delay
time.
The rising event dead-band time is set by the value
contained in the GxDBR<3:0> bits of the COGxDB
register. When the value is zero, rising event dead
band is disabled.
11.5.2 FALLING EVENT DEAD BAND
Falling event dead-band delays the turn-on of
COGxOUT1 from when COGxOUT0 is turned off. The
falling event dead-band time starts when the falling
event output goes true. The falling event output goes
true coincident with the unblanked falling input event.
The falling event dead-band time is set by the value
contained in the GxDBF<3:0> bits of the COGxDB
register. When the value is zero, falling event dead
band is disabled.
11.5.3 DEAD-BAND TIME UNCERTAINTY
When the rising and falling events that trigger the
dead-band counters come from asynchronous inputs,
it creates uncertainty in the dead-band time. The max-
imum uncertainty is equal to one COG_clock period.
Refer to Equation 11-1 for more detail.
11.5.4 DEAD-BAND OVERLAP
There are two cases of dead-band overlap:
• Rising-to-falling
• Falling-to-rising
11.5.4.1 Rising-to-Falling Overlap
In this case, the falling event occurs while the rising
event dead-band counter is still counting. When this
happens, the COGxOUT0 drive is suppressed and the
dead band extends by the falling event dead-band
time. At the termination of the extended dead-band
time, the COGxOUT1 drive goes true.
11.5.4.2 Falling-to-Rising Overlap
In this case, the rising event occurs while the falling
event dead-band counter is still counting. When this
happens, the COGxOUT1 drive is suppressed and the
dead band extends by the rising event dead-band
time. At the termination of the extended dead-band
time, the COGxOUT0 drive goes true.