Datasheet

PIC12F752/HV752
DS41576B-page 88 Preliminary  2011 Microchip Technology Inc.
11.2 Clock Sources
The COG_clock is used as the reference clock to the
various timers in the peripheral. Timers that use the
COG_clock include:
• Rising and falling dead-band time
• Rising and falling blanking time
• Rising event phase delay
Clock sources available for selection include:
• 8 MHz HFINTOSC
• Instruction clock (Fosc/4)
• System clock (Fosc)
The clock source is selected with the GxCS<1:0> bits
of the COGxCON0 register (Register 11-1).
11.3 Selectable Event Sources
The COG uses two independently selectable event
sources to generate the complementary waveform:
• Rising event source
• Falling event source
Level or edge sensitive modes are available for each
event input.
The rising event source is selected with the GxRS<2:0>
bits and the mode is controlled with the GxRSIM bit.
The falling event source is selected with the GxFS<2:0>
bits and the mode is controlled with the GxFSIM bit.
Selection and mode control bits for both sources are
located in the COGxCON1 register (Register 11-2).
11.3.1 EDGE VS. LEVEL SENSING
Event input detection may be selected as level or edge
sensitive. In general, events that are driven from a peri-
odic source should be edge detected and events that
are derived from voltage thresholds at the target circuit
should be level sensitive. Consider the following two
examples:
1. The first example is an application in which the
period is determined by a 50% duty cycle clock and the
COG output duty cycle is determined by a voltage level
fed back through a comparator. If the clock input is level
sensitive then duty cycles less than 50% will exhibit
erratic operation.
2. The second example is similar to the first except that
the duty cycle is close to 100%. The feedback compar-
ator high-to-low transition trips the COG drive off but
almost immediately the period source turns the drive
back on. If the off cycle is short enough then the com-
parator input may not reach the low side of the hyster-
esis band precluding an output change. The
comparator output stays low and without a high-to-low
transition to trigger the edge sense then the drive of the
COG output will be stuck in a constant drive-on condi-
tion. See Figure 11-4.
FIGURE 11-4: EDGE VS LEVEL SENSE
11.3.2 RISING EVENT
The rising event starts the PWM output active duty
cycle period. The rising event is the low-to-high
transition of the selected rising event source. When the
phase delay and rising event dead-band time values
are zero, the COGxOUT0 output starts immediately.
Otherwise, the COGxOUT0 output is delayed. The
rising event causes all the following actions:
• Start rising event phase delay counter (if
enabled).
• Clear COGxOUT1 after phase delay.
• Start falling event input blanking (if enabled).
• Start dead-band counter (if enabled).
• Set COGxOUT0 output after dead-band counter
expires.
11.3.3 FALLING EVENT
The falling event terminates the PWM output active duty
cycle period. The falling event is the high-to-low
transition of the selected falling event source. When the
falling event dead-band time value is zero, the
COGxOUT1 output starts immediately. Otherwise, the
COGxOUT1 output is delayed. The falling event causes
all the following actions:
• Clear COGxOUT0.
• Start rising event input blanking (if enabled).
• Start falling event dead-band counter (if enabled).
• Set COGxOUT1 output after dead-band counter
expires.
Rising (CCP1)
Falling (C1OUT)
C1IN-
COGOUT
hyst
Edge Sensitive
Rising (CCP1)
Falling (C1OUT)
C1IN-
COGOUT
hyst