Datasheet

 2011 Microchip Technology Inc. Preliminary DS41576B-page 11
PIC12F752/HV752
2.0 MEMORY ORGANIZATION
2.1 Program Memory Organization
The PIC12F752/HV752 has a 13-bit program counter
capable of addressing an 8K x 14 program memory
space. Only the first 1K x 14 (0000h-03FFh) is
physically implemented. Accessing a location above
these boundaries will cause a wrap-around within the
first 1K x 14 space for PIC12F752/HV752. The Reset
vector is at 0000h and the interrupt vector is at 0004h
(see Figure 2-1).
FIGURE 2-1: PROGRAM MEMORY MAP
AND STACK FOR THE
PIC12F752/HV752
2.2 Data Memory Organization
The data memory (see Figure 2-2) is partitioned into four
banks, which contain the General Purpose Registers
(GPR) and the Special Function Registers (SFR). The
Special Function Registers are located in the first 32
locations of each bank. Register locations 40h-6Fh in
Bank 0 are General Purpose Registers, implemented as
static RAM. Register locations 70h-7Fh in Bank 0 are
Common RAM and shared as the last 16 addresses in
all Banks. All other RAM is unimplemented and returns
‘0’ when read. The RP<1:0> bits of the STATUS register
are the bank select bits.
RP1
RP0
00  Bank 0 is selected
01  Bank 1 is selected
10  Bank 2 is selected
11  Bank 3 is selected
PC<12:0>
13
0000h
0004h
0005h
03FFh
0400h
1FFFh
Stack Level 1
Stack Level 8
Reset Vector
Interrupt Vector
On-chip Program
Memory
CALL, RETURN
RETFIE, RETLW
Stack Level 2
Wraps to 0000h-03FFh