Datasheet

PIC12F683

TABLE 12-5: INITIALIZATION CONDITION FOR SPECIAL REGISTERS

EECON1 9Ch ---- x000 ---- q000 ---- uuuu

EECON2 9Dh ---- ---- ---- ---- ---- ----

ADRESL 9Eh xxxx xxxx uuuu uuuu uuuu uuuu

ANSEL 9Fh -000 1111 -000 1111 -uuu uuuu

TABLE 12-4: INITIALIZATION CONDITION FOR REGISTERS (CONTINUED)

MCLR

Reset

WDT Reset

Brown-out Reset

(1)

Wake-up from Sleep

through Interrupt

Wake-up from Sleep through

WDT Time-out

Legend: u = unchanged, x = unknown, – = unimplemented bit, reads as ‘0’, q = value depends on condition.

Note 1: If VDD goes too low, Power-on Reset will be activated and registers will be affected differently.

2: One or more bits in INTCON and/or PIR1 will be affected (to cause wake-up).

3: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt

vector (0004h).

4: See Table 12-5 for Reset value for specific condition.

5: If Reset was due to brown-out, then bit 0 = 0. All other Resets will cause bit 0 = u.

Condition

Program

Counter

Status

PCON

Power-on Reset 000h 0001 1xxx --01 --0x

MCLR

Reset during Normal Operation 000h 000u uuuu --0u --uu

MCLR

Reset during Sleep 000h 0001 0uuu --0u --uu

WDT Reset 000h 0000 uuuu --0u --uu

WDT Wake-up PC + 1 uuu0 0uuu --uu --uu

Brown-out Reset 000h 0001 1uuu --01 --10

Interrupt Wake-up from Sleep PC + 1

(1)

uuu1 0uuu --uu --uu

Legend: u = unchanged, x = unknown, – = unimplemented bit, reads as ‘0’.

Note 1: When the wake-up is due to an interrupt and Global Interrupt Enable bit, GIE, is set, the PC is loaded with

the interrupt vector (0004h) after execution of PC + 1.