Datasheet

© 2007 Microchip Technology Inc. DS41211D-page 59
PIC12F683
FIGURE 8-7: COMPARATOR VOLTAGE REFERENCE BLOCK DIAGRAM
TABLE 8-2: SUMMARY OF REGISTERS ASSOCIATED WITH THE COMPARATOR AND VOLTAGE
REFERENCE MODULES
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on
all other
Resets
ANSEL
— ADCS2 ADCS1 ADCS0 ANS3 ANS2 ANS1 ANS0 -000 1111 -000 1111
CMCON0
—COUT— CINV CIS CM2 CM1 CM0 -0-0 0000 -0-0 0000
CMCON1
— — — — — — T1GSS CMSYNC ---- --10 ---- --10
INTCON GIE PEIE
T0IE INTE GPIE T0IF INTF GPIF 0000 0000 0000 000x
PIE1
EEIE ADIE CCP1IE —CMIEOSFIE TMR2IE TMR1IE 000- 0000 0000 0000
PIR1
EEIF ADIF CCP1IF —CMIFOSFIF TMR2IF TMR1IF 000- 0000 000- 0000
GPIO
— — GP5 GP4 GP3 GP2 GP1 GP0 --xx xxxx --uu uuuu
TRISIO
— — TRISIO5 TRISIO4 TRISIO3 TRISIO2 TRISIO1 TRISIO0 --11 1111 --11 1111
VRCON VREN
—VRR— VR3 VR2 VR1 VR0 0-0- 0000 -0-0 0000
Legend: x = unknown, u = unchanged, - = unimplemented, read as ‘0’. Shaded cells are not used for comparator.
VRR
8R
VR<3:0>
(1)
16-1 Analog
8RRR RR
CVREF to
16 Stages
Comparator
Input
VREN
VDD
MUX
VR<3:0> = 0000
VREN
VRR
0
1
2
14
15
Note 1: Care should be taken to ensure VREF
remains within the comparator Common
mode input range. See Section 15.0
“Electrical Specifications” for more detail.