Datasheet

PIC12F629/675
DS41190E-page 94 © 2007 Microchip Technology Inc.
FIGURE 12-6: CLKOUT AND I/O TIMING
TABLE 12-3: CLKOUT AND I/O TIMING REQUIREMENTS
OSC1
CLKOUT
I/O pin
(Input)
I/O pin
(Output)
Q4
Q1
Q2 Q3
10
13
14
17
20, 21
22
23
19
18
15
11
12
16
Old Value
New Value
Param
No.
Sym Characteristic Min Typ† Max Units Conditions
10 TosH2ckL OSC1↑ to CLK-
OUT↓
— 75 200 ns (Note 1)
11 TosH2ckH OSC1↑ to CLK-
OUT↑
— 75 200 ns (Note 1)
12 Tc kR CLKOUT rise time — 35 100 ns (Note 1)
13 Tc kF CLKOUT fall time — 35 100 ns (Note 1)
14 Tc kL2 i oV CLKOUT↓ to Port out valid — — 20 ns (Note 1)
15 TioV2ckH Port in valid before CLKOUT↑ TOSC + 200
ns
— — ns (Note 1)
16 Tc kH2 i o I Port in hold after CLKOUT↑ 0 — — ns (Note 1)
17 To sH2 i o V OSC1↑ (Q1 cycle) to Port out valid — 50 150 * ns
— — 300 ns
18 To sH2 i o I OSC1↑ (Q2 cycle) to Port input
invalid (I/O in hold time)
100 — — ns
19 TioV2osH Port input valid to OSC1↑
(I/O in setup time)
0 — — ns
20 TioR Port output rise time — 10 40 ns
21 TioF Port output fall time — 10 40 ns
22 Tinp INT pin high or low time 25 — — ns
23 Trbp GPIO change INT high or low time TCY — — ns
* These parameters are characterized but not tested.
† Data in ‘Typ’ column is at 5.0V, 25°C unless otherwise stated.
Note 1: Measurements are taken in RC mode where CLKOUT output is 4xTOSC.