Datasheet

PIC12F629/675
DS41190E-page 20 © 2007 Microchip Technology Inc.
REGISTER 3-2: TRISIO — GPIO TRI-STATE REGISTER (ADDRESS: 85h)
REGISTER 3-3: WPU — WEAK PULL-UP REGISTER (ADDRESS: 95h)
U-0 U-0 R/W-x R/W-x R-1 R/W-x R/W-x R/W-x
— —
TRISIO5 TRISIO4 TRISIO3 TRISIO2 TRISIO1 TRISIO0
bit 7 bit 0
bit 7-6: Unimplemented: Read as ’0’
bit 5-0: TRISIO<5:0>: General Purpose I/O Tri-State Control bit
1 = GPIO pin configured as an input (tri-stated)
0 = GPIO pin configured as an output.
Note: TRISIO<3> always reads 1.
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
- n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown
U-0 U-0 R/W-1 R/W-1 U-0 R/W-1 R/W-1 R/W-1
— — WPU5 WPU4 — WPU2 WPU1 WPU0
bit 7 bit 0
bit 7-6 Unimplemented: Read as ‘0’
bit 5-4 WPU<5:4>: Weak Pull-up Register bit
1 = Pull-up enabled
0 = Pull-up disabled
bit 3 Unimplemented: Read as ‘0’
bit 2-0 WPU<2:0>: Weak Pull-up Register bit
1 = Pull-up enabled
0 = Pull-up disabled
Note 1: Global GPPU must be enabled for individual pull-ups to be enabled.
2: The weak pull-up device is automatically disabled if the pin is in Output mode
(TRISIO = 0).
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
- n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown