Datasheet

© 2007 Microchip Technology Inc. DS41190E-page 9
PIC12F629/675
TABLE 2-1: SPECIAL FUNCTION REGISTERS SUMMARY
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOD
Page
Bank 0
00h INDF
(1)
Addressing this Location uses Contents of FSR to Address Data Memory 0000 0000 18,59
01h TMR0 Timer0 Module’s Register xxxx xxxx 27
02h PCL Program Counter's (PC) Least Significant Byte 0000 0000 17
03h STATUS
IRP
(2)
RP1
(2)
RP0 TO PD Z DC C
0001 1xxx 11
04h FSR Indirect Data Memory Address Pointer xxxx xxxx 18
05h GPIO — — GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0 --xx xxxx 19
06h — Unimplemented — —
07h — Unimplemented — —
08h — Unimplemented — —
09h — Unimplemented — —
0Ah PCLATH — — — Write Buffer for Upper 5 bits of Program Counter ---0 0000 17
0Bh INTCON GIE PEIE T0IE INTE GPIE T0IF INTF GPIF 0000 0000 13
0Ch PIR1 EEIF ADIF — — CMIF — — TMR1IF 00-- 0--0 15
0Dh — Unimplemented — —
0Eh TMR1L Holding Register for the Least Significant Byte of the 16-bit Timer1 xxxx xxxx 30
0Fh TMR1H Holding Register for the Most Significant Byte of the 16-bit Timer1 xxxx xxxx 30
10h T1CON — TMR1GE T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON -000 0000 32
11h — Unimplemented — —
12h — Unimplemented — —
13h — Unimplemented — —
14h — Unimplemented — —
15h — Unimplemented — —
16h — Unimplemented — —
17h — Unimplemented — —
18h — Unimplemented — —
19h CMCON —
COUT
—
CINV CIS CM2 CM1 CM0
-0-0 0000 35
1Ah — Unimplemented — —
1Bh — Unimplemented — —
1Ch — Unimplemented — —
1Dh — Unimplemented — —
1Eh ADRESH
(3)
Most Significant 8 bits of the Left Shifted A/D Result or 2 bits of the Right Shifted Result xxxx xxxx 42
1Fh ADCON0
(3)
ADFM VCFG — — CHS1 CHS0 GO/DONE ADON 00-- 0000 43,59
Legend: — = unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition,
shaded = unimplemented
Note 1: This is not a physical register.
2: These bits are reserved and should always be maintained as ‘0’.
3: PIC12F675 only.