Datasheet

PIC12F629/675
DS41190G-page 24  2010 Microchip Technology Inc.
3.3 Pin Descriptions and Diagrams
Each GPIO pin is multiplexed with other functions. The
pins and their combined functions are briefly described
here. For specific information about individual functions
such as the comparator or the A/D, refer to the
appropriate section in this Data Sheet.
3.3.1 GP0/AN0/CIN+
Figure 3-1 shows the diagram for this pin. The GP0 pin
is configurable to function as one of the following:
• a general purpose I/O
• an analog input for the A/D (PIC12F675 only)
• an analog input to the comparator
3.3.2 GP1/AN1/CIN-/VREF
Figure 3-1 shows the diagram for this pin. The GP1 pin
is configurable to function as one of the following:
• as a general purpose I/O
• an analog input for the A/D (PIC12F675 only)
• an analog input to the comparator
• a voltage reference input for the A/D (PIC12F675
only)
FIGURE 3-1: BLOCK DIAGRAM OF GP0
AND GP1 PINS
I/O pin
VDD
VSS
D
Q
CK
Q
D
Q
CK
Q
D
Q
CK
Q
D
Q
CK
Q
VDD
D
EN
Q
D
EN
Q
Weak
Data Bus
WR
WPU
RD
WPU
RD PORT
RD
PORT
WR
PORT
WR
TRISIO
RD
TRISIO
WR
IOC
RD
IOC
Interrupt-on-Change
To Comparator
To A/D Converter
Analog
Input Mode
GPPU
Analog
Input Mode