Datasheet

PIC12F617
DS41388A-page 2 Advance Information © 2009 Microchip Technology Inc.
TABLE 1: PIC12F617 FEATURE SUMMARY
FIGURE 1: PIC12F617 PIN DIAGRAM
Device
Program
Memory
Flash (Words)
Self Read/
Self Write
SRAM
(bytes)
I/O
Timers
8/16 bit
10-bit A/D
Channels
Comparators ECCP
PIC12F617 2048 x 14 Yes/Yes 128 6 2/1 4 1 Yes
Note: Pin details are subject to change.
PDIP, SOIC, MSOP, DFN
PIC12F617
1
2
3
4
VDD
GP5/P1A
(1)
/T1CKI/OSC1/CLKIN
GP4/AN3/CIN1-/T1G
/P1B
(1)
/OSC2/CLKOOUT
GP3/T1G
(1)
/MCLR/VPP
VSS
GP0/AN0/CIN+/P1B
(1)
/ICSPDAT
GP1/AN1/CIN0-/V
REF/ICSPCLK
GP2/AN2/T0CKI/INT/COUT/CCP1/P1A
(1)
8
7
6
5
Note 1: Pin feature is dependent on device configuration.
TABLE 2: PIC12F617 PIN SUMMARY (PDIP, SOIC, MSOP, DFN)
I/O
8-pin PDIP, SOIC,
MSOP, DFN
A/D
Reference
Comparator
Timers
ECCP
Pull-up
Interrupt
Basic
GP0 7 AN0 — CIN+ — P1B
(1)
Y IOC ICSPDAT
GP1 6 AN1 VREF CIN0- — — Y IOC ICSPCLK
GP2 5 AN2 — COUT T0CKI CCP1
/
P1A
(1)
YINT
IOC
—
GP3 4 — — — T1G
(1)
— Y
(2)
IOC MCLR/VPP
GP4 3 AN3 — CIN1- T1G
(1)
P1B
(1)
Y IOC OSC2/CLKOUT
GP5 2 — — — T1CKI P1A
(1)
Y IOC OSC1/CLKIN
VDD 1——————— —
VSS 8 — — — — — — — —
Note 1: Pin feature is dependent on device configuration.
2: Pull-up only available when pin is configured as MCLR
.