Datasheet

PIC12F609/615/617/12HV609/615

DS41302D-page 76  2010 Microchip Technology Inc.

R/W-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0

CMVREN

— VRR FVREN VR3 VR2 VR1 VR0

bit 7 bit 0

Legend:

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown

bit 7 CMVREN: Comparator Voltage Reference Enable bit

(1, 2)

1 = CVREF circuit powered on and routed to CVREF input of the Comparator

0 = 0.6 Volt constant reference routed to CV

REF input of the Comparator

bit 6 Unimplemented: Read as ‘0’

bit 5 VRR: CV

REF Range Selection bit

1 = Low range

0 = High range

bit 4 FVREN: 0.6V Reference Enable bit

(2)

1 = Enabled

0 = Disabled

bit 3-0 VR<3:0>: Comparator Voltage Reference CV

REF Value Selection bits (0  VR<3:0>  15)

When VRR = 1: CVREF = (VR<3:0>/24) * VDD

When VRR = 0: CVREF = VDD/4 + (VR<3:0>/32) * VDD

Note 1: When CMVREN is low, the CVREF circuit is powered down and does not contribute to IDD current.

2: When CMVREN is low and the FVREN bit is low, the CVREF signal should provide Vss to the comparator.