Datasheet

PIC12F609/615/617/12HV609/615
DS41302D-page 52  2010 Microchip Technology Inc.
TABLE 5-1: SUMMARY OF REGISTERS ASSOCIATED WITH GPIO
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on
all other
Resets
ANSEL
— ADCS2
(1)
ADCS1
(1)
ADCS0
(1)
ANS3 ANS2
(1)
ANS1 ANS0 -000 1111 -000 1111
CMCON0
CMON COUT CMOE CMPOL —CMR—CMCH0000 -0-0 0000 -0-0
INTCON GIE
PEIE T0IE INTE GPIE T0IF INTF GPIF 0000 0000 0000 0000
IOC
— — IOC5 IOC4 IOC3 IOC2 IOC1 IOC0 --00 0000 --00 0000
OPTION_REG GPPU
INTEDG T0CS T0SE PSA PS2 PS1 PS0 1111 1111 1111 1111
GPIO
— — GP5 GP4 GP3 GP2 GP1 GP0 --xx xxxx --u0 u000
TRISIO
— — TRISIO5 TRISIO4 TRISIO3 TRISIO2 TRISIO1 TRISIO0 --11 1111 --11 1111
WPU
— — WPU5 WPU4 WPU3 WPU2 WPU1 WPU0 --11 1111 --11 -111
T1CON
T1GINV TMR1GE TICKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON 0000 0000 uuuu uuuu
CCP1CON
(1)
P1M — DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 0-00 0000 0-00 0000
APFCON
(1)
— — — T1GSEL — — P1BSEL P1ASEL ---0 --00 ---0 --00
Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by GPIO.
Note 1: PIC12F615/617/HV615 only.