Datasheet

PIC12F609/615/617/12HV609/615
DS41302D-page 48  2010 Microchip Technology Inc.
5.2.4.3 GP2/AN2
(1)
/T0CKI/INT/COUT/
CCP1
(1)
/P1A
(1)
Figure 5-2 shows the diagram for this pin. The GP2 pin
is configurable to function as one of the following:
• a general purpose I/O
• an analog input for the ADC
(1)
• the clock input for TMR0
• an external edge triggered interrupt
• a digital output from Comparator
• a Capture input/Compare input/PWM output
(1)
• a PWM output
(1)
FIGURE 5-2: BLOCK DIAGRAM OF GP2
Note 1: PIC12F615/617/HV615 only.
VDD
VSS
D
Q
CK
Q
D
Q
CK
Q
D
Q
CK
Q
D
Q
CK
Q
VDD
D
EN
Q
D
EN
Q
Weak
RD GPIO
RD
WR
WR
RD
WR
IOC
RD
IOC
Interrupt-on-
To INT
Analog
(1)
Input Mode
GPPU
Analog
(1)
Input Mode
Change
Q1
WR
RD
WPU
Data Bus
WPU
GPIO
TRISIO
TRISIO
GPIO
Note 1: Comparator mode and ANSEL determines Analog Input mode.
2: Set has priority over Reset.
3: PIC12F615/617/HV615 only.
To A/D Converter
(3)
I/O Pin
S
(2)
R
Q
From other
GP<5:3, 1:0> pins
Write ‘0’ to GBIF
0
1
C1OE
C1OE
Enable
To Timer0