Datasheet

 2010 Microchip Technology Inc. DS41302D-page 13
PIC12F609/615/617/12HV609/615
FIGURE 2-4: DATA MEMORY MAP OF
THE PIC12F615/617/HV615
Indirect Addr.
(1)
TMR0
PCL
STATUS
FSR
GPIO
PCLATH
INTCON
PIR1
TMR1L
TMR1H
T1CON
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
20h
7Fh
Bank 0
Unimplemented data memory locations, read as ‘0’.
Note 1: Not a physical register.
2: Used for the PIC12F617 only.
File
Address
File
Address
WPU
IOC
Indirect Addr.
(1)
OPTION_REG
PCL
STATUS
FSR
TRISIO
PCLATH
INTCON
PIE1
PCON
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
A0h
FFh
Bank 1
ADRESH
ADCON0
ADRESL
ANSEL
Accesses 70h-7Fh
F0h
TMR2
T2CON
CCPR1L
CCPR1H
CCP1CON
PWM1CON
ECCPAS
VRCON
CMCON0
OSCTUNE
PR2
40h
3Fh
CMCON1
EFh
APFCON
General
Purpose
Registers
64 Bytes
Accesses 70h-7Fh
6Fh
70h
PMCON1
(2)
PMCON2
(2)
PMADRL
(2)
PMADRH
(2)
PMDATL
(2)
PMDATH
(2)
General
Purpose
Registers
96 Bytes from
20h-7Fh
(2)
Unimplemented for
PIC12F615/HV615
General
Purpose
Registers
32 Bytes
(2)
Unimplemented for
PIC12F615/HV615
BFh
C0h