Datasheet

 2010 Microchip Technology Inc. DS41302D-page 115
PIC12F609/615/617/12HV609/615
TABLE 12-4: INITIALIZATION CONDITION FOR REGISTERS (PIC12F609/HV609)
Register Address
Power-on
Reset
MCLR
Reset
WDT Reset
Brown-out Reset
(1)
Wake-up from Sleep through
Interrupt
Wake-up from Sleep through
WDT Time-out
W—xxxx xxxx uuuu uuuu uuuu uuuu
INDF 00h/80h xxxx xxxx xxxx xxxx uuuu uuuu
TMR0 01h xxxx xxxx uuuu uuuu uuuu uuuu
PCL 02h/82h 0000 0000 0000 0000 PC + 1
(3)
STATUS 03h/83h 0001 1xxx 000q quuu
(4)
uuuq quuu
(4)
FSR 04h/84h xxxx xxxx uuuu uuuu uuuu uuuu
GPIO 05h --x0 x000 --u0 u000 --uu uuuu
PCLATH 0Ah/8Ah ---0 0000 ---0 0000 ---u uuuu
INTCON 0Bh/8Bh 0000 0000 0000 0000 uuuu uuuu
(2)
PIR1 0Ch ----- 0--0 ---- 0--0 ---- u--u
(2)
TMR1L 0Eh xxxx xxxx uuuu uuuu uuuu uuuu
TMR1H 0Fh xxxx xxxx uuuu uuuu uuuu uuuu
T1CON 10h 0000 0000 uuuu uuuu -uuu uuuu
VRCON 19h 0-00 0000 0-00 0000 u-uu uuuu
CMCON0 1Ah 0000 -0-0 0000 -0-0 uuuu -u-u
CMCON1 1Ch ---0 0-10 ---0 0-10 ---u u-qu
OPTION_REG 81h 1111 1111 1111 1111 uuuu uuuu
TRISIO 85h --11 1111 --11 1111 --uu uuuu
PIE1 8Ch ----- 0--0 ---- 0--0 ---- u--u
PCON 8Eh ---- --0x ---- --uu
(1, 5)
---- --uu
OSCTUNE 90h ---0 0000 ---u uuuu ---u uuuu
WPU 95h --11 -111 --11 -111 --uu -uuu
IOC 96h --00 0000 --00 0000 --uu uuuu
ANSEL 9Fh ---- 1-11 ---- 1-11 ---- q-qq
Legend: u = unchanged, x = unknown, – = unimplemented bit, reads as ‘0’, q = value depends on condition.
Note 1: If V
DD goes too low, Power-on Reset will be activated and registers will be affected differently.
2: One or more bits in INTCON and/or PIR1 will be affected (to cause wake-up).
3: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt
vector (0004h).
4: See Table 12-6 for Reset value for specific condition.
5: If Reset was due to brown-out, then bit 0 = 0. All other Resets will cause bit 0 = u.