Datasheet

PIC12(L)F1840
DS41441C-page 56 2011-2012 Microchip Technology Inc.
TABLE 5-2: SUMMARY OF REGISTERS ASSOCIATED WITH CLOCK SOURCES
TABLE 5-3: SUMMARY OF CONFIGURATION WORD WITH CLOCK SOURCES
REGISTER 5-3: OSCTUNE: OSCILLATOR TUNING REGISTER
U-0 U-0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0
TUN<5:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7-6 Unimplemented: Read as0
bit 5-0 TUN<5:0>: Frequency Tuning bits
100000 = Minimum frequency
111111 =
000000 = Oscillator module is running at the factory-calibrated frequency.
000001 =
011110 =
011111 = Maximum frequency
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
OSCCON SPLLEN IRCF<3:0>
—SCS<1:0>54
OSCSTAT T1OSCR PLLR OSTS HFIOFR HFIOFL MFIOFR LFIOFR HFIOFS 55
OSCTUNE
—TUN<5:0>56
PIE2 OSFIE
C1IE EEIE BCL1IE 76
PIR2
OSFIF
C1IF EEIF BCL1IF
78
T1CON
TMR1CS<1:0> T1CKPS<1:0> T1OSCEN T1SYNC TMR1ON
161
Legend: = unimplemented location, read as ‘0’. Shaded cells are not used by clock sources.
Note 1: PIC12(L)F1840 only.
Name Bits Bit -/7 Bit -/6 Bit 13/5 Bit 12/4 Bit 11/3 Bit 10/2 Bit 9/1 Bit 8/0
Register
on Page
CONFIG1
13:8
FCMEN IESO CLKOUTEN BOREN<1:0> CPD
34
7:0
CP MCLRE PWRTE WDTE<1:0> FOSC<2:0>
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by clock sources.
Note 1: PIC12F1840 only.