Datasheet

 2011-2012 Microchip Technology Inc. DS41441C-page 3
PIC12(L)F1840
FIGURE 1: 8-PIN DIAGRAM FOR PIC12(L)F1840
TABLE 1: 8-PIN ALLOCATION TABLE (PIC12(L)F1840)
I/O
8-Pin PDIP/SOIC/DFN
ADC
Reference
Cap Sense
Comparator
SR Latch
Timers
ECCP
EUSART
MSSP
Interrupt
Modulator
Pull-up
Basic
RA0 7 AN0 DACOUT CPS0 C1IN+ — — P1B TX
CK
SDO
SS
(1)
IOC MDOUT
Y ICSPDAT
ICDDAT
RA1 6 AN1 VREF CPS1 C1IN0- SRI — — RX
DT
SCL
SCK
IOC MDMIN
YICSPCLK
ICPCLK
RA2 5 AN2 — CPS2 C1OUT SRQ T0CKI CCP1
P1A
FLT0
— SDA
SDI
INT/
IOC
MDCIN1
Y —
RA34—— —— —T1G
(1)
——
SS
IOC —
Y
MCLR
VPP
RA4 3 AN3 — CPS3 C1IN1- — T1G
T1OSO
P1B
(1)
TX
(1)
CK
(1)
SDO
(1)
IOC MDCIN2
Y OSC2
CLKOUT
CLKR
RA5 2 — — — — SRNQ T1CKI
T1OSI
CCP1
(1)
P1A
(1)
RX
(1)
DT
(1)
—IOC—
YOSC1
CLKIN
VDD 1 — — — — — — — — — — —
— VDD
VSS 8———————————
—VSS
Note 1: Alternate pin function selected with the APFCON (Register 12-1) register.
PDIP, SOIC, DFN
1
2
3
4
8
7
6
5
VDD
RA5
RA4
MCLR
/VPP/RA3
V
SS
RA0/ICSPDAT
RA1/ICSPCLK
RA2
Note 1: See Tabl e 1 for the location of all peripheral functions.
PIC12(L)F1840