Datasheet

2011-2012 Microchip Technology Inc. DS41441C-page 293
PIC12(L)F1840
27.9 Register Definitions: Capacitive Sensing Control
REGISTER 27-1: CPSCON0: CAPACITIVE SENSING CONTROL REGISTER 0
R/W-0/0 R/W-0/0 U-0 U-0 R/W-0/0 R/W-0/0 R-0/0 R/W-0/0
CPSON CPSRM
CPSRNG<1:0> CPSOUT T0XCS
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7
CPSON: CPS Module Enable bit
1 = CPS module is enabled
0 = CPS module is disabled
bit 6
CPSRM: Capacitive Sensing Reference Mode bit
1 = Capacitive Sensing module is in Variable Voltage Reference mode.
0 = Capacitive Sensing module is in Fixed Voltage Reference mode.
bit 5-4
Unimplemented: Read as ‘0
bit 3-2
CPSRNG<1:0>: Capacitive Sensing Current Range bit
If CPSRM =
1 (variable voltage reference mode):
(2)
11 = Oscillator is in High Current Range.
10 = Oscillator is in Medium Current Range.
01 = Oscillator is in Low Current Range.
00 = Oscillator is on. Noise detection mode.
If CPSRM =
0 (fixed voltage reference mode):
(1)
11 = Oscillator is in High Current Range.
10 = Oscillator is in Medium Current Range.
01 = Oscillator is in Low Current Range.
00 = Oscillator is off.
bit 1
CPSOUT: Capacitive Sensing Oscillator Status bit
1 = Oscillator is sourcing current (Current flowing out of the pin)
0 = Oscillator is sinking current (Current flowing into the pin)
bit 0
T0XCS: Timer0 External Clock Source Select bit
If TMR0CS =
1:
The T0XCS bit controls which clock external to the core/Timer0 module supplies Timer0:
1 = Timer0 clock source is the capacitive sensing oscillator, CPSCLK
0 = Timer0 clock source is the T0CKI pin
If TMR0CS =
0:
Timer0 clock source is controlled by the core/Timer0 module and is FOSC/4