Datasheet

 2011-2012 Microchip Technology Inc. DS41441C-page 163
PIC12(L)F1840
TABLE 21-5: SUMMARY OF REGISTERS ASSOCIATED WITH TIMER1
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
ANSELA — — — ANSA4 — ANSA2 ANSA1 ANSA0
106
CCP1CON
P1M<1:0> DC1B<1:0> CCP1M<3:0>
197
INTCON GIE PEIE
TMR0IE INTE IOCIE TMR0IF INTF IOCIF
74
PIE1 TMR1GIE
ADIE RCIE TXIE SSP1IE CCP1IE TMR2IE TMR1IE
75
PIR1 TMR1GIF
ADIF RCIF TXIF SSP1IF CCP1IF TMR2IF TMR1IF
77
TMR1H Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
157*
TMR1L Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
157*
TRISA
— — TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 105
T1CON
TMR1CS<1:0> T1CKPS<1:0> T1OSCEN T1SYNC
—TMR1ON
161
T1GCON
TMR1GE T1GPOL T1GTM T1GSPM T1GGO/
DONE
T1GVAL T1GSS<1:0>
162
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Timer1 module.
* Page provides register information.