Datasheet
PIC12(L)F1840
DS40001441D-page 148 2011-2013 Microchip Technology Inc.
TABLE 19-3: SUMMARY OF REGISTERS ASSOCIATED WITH COMPARATOR MODULE
REGISTER 19-2: CM1CON1: COMPARATOR C1 CONTROL REGISTER 1
R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 U-0 U-0 U-0 R/W-0/0
C1INTP C1INTN C1PCH<1:0>
— — —
C1NCH
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7
C1INTP: Comparator Interrupt on Positive Going Edge Enable bits
1 = The C1IF interrupt flag will be set upon a positive going edge of the C1OUT bit
0 = No interrupt flag will be set on a positive going edge of the C1OUT bit
bit 6
C1INTN: Comparator Interrupt on Negative Going Edge Enable bits
1 = The C1IF interrupt flag will be set upon a negative going edge of the C1OUT bit
0 = No interrupt flag will be set on a negative going edge of the C1OUT bit
bit 5-4
C1PCH<1:0>: Comparator Positive Input Channel Select bits
10 = C1VP connects to FVR Voltage Reference
01 = C1VP connects to DAC Voltage Reference
00 = C1VP connects to C1IN+ pin
bit 3-1
Unimplemented: Read as ‘0’
bit 0
C1NCH: Comparator Negative Input Channel Select bit
1 = C1VN connects to C1IN1- pin
0 = C1VN connects to C1IN0- pin
REGISTER 19-3: CMOUT: COMPARATOR OUTPUT REGISTER
U-0 U-0 U-0 U-0 U-0 U-0 U-0 R-0/0
— — — — — — —
MC1OUT
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7-1
Unimplemented: Read as ‘0’
bit 0
MC1OUT: Mirror Copy of C1OUT bit
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
ANSELA — — —ANSA4— ANSA2 ANSA1 ANSA0 106
CM1CON0 C1ON C1OUT C1OE C1POL
— C1SP C1HYS C1SYNC 147
CM1CON1 C1INTP C1INTN C1PCH<1:0>
— — — C1NCH 148
CMOUT
— — — — — — —MC1OUT148
INTCON GIE PEIE
TMR0IE INTE IOCIE TMR0IF INTF IOCIF
74
PIE2
OSFIE
—
C1IE
EEIE BCL1IE
—
— — 76
PIR2
OSFIF —C1IFEEIF BCL1IF — — —
78
TRISA
— — TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 105
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the comparator module.