Datasheet

PIC12(L)F1840
DS40001441D-page 24  2011-2013 Microchip Technology Inc.
Bank 4
20Ch WPUA
— — WPUA5 WPUA4 WPUA3 WPUA2 WPUA1 WPUA0 --11 1111 --11 1111
20Dh
to
210h
— Unimplemented — —
211h SSP1BUF Synchronous Serial Port Receive Buffer/Transmit Register xxxx xxxx uuuu uuuu
212h SSP1ADD ADD<7:0> 0000 0000 0000 0000
213h SSP1MSK MSK<7:0> 1111 1111 1111 1111
214h SSP1STAT SMP CKE D/A
PSR/WUA BF 0000 0000 0000 0000
215h SSP1CON1 WCOL SSP1OV SSP1EN CKP SSP1M<3:0> 0000 0000 0000 0000
216h SSP1CON2 GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN 0000 0000 0000 0000
217h SSP1CON3 ACKTIM PCIE SCIE BOEN SDAHT SBCDE AHEN DHEN 0000 0000 0000 0000
218h
to
21Fh
— Unimplemented — —
Bank 5
28Ch
to
290h
— Unimplemented — —
291h CCPR1L Capture/Compare/PWM Register 1 (LSB) xxxx xxxx uuuu uuuu
292h CCPR1H Capture/Compare/PWM Register 1 (MSB) xxxx xxxx uuuu uuuu
293h CCP1CON P1M<1:0> DC1B<1:0> CCP1M<3:0> 0000 0000 0000 0000
294h PWM1CON P1RSEN P1DC<6:0> 0000 0000 0000 0000
295h CCP1AS CCP1ASE CCP1AS<2:0> PSS1AC<1:0> PSS1BD<1:0> 0000 0000 0000 0000
296h PSTR1CON
— — — STR1SYNC Reserved Reserved STR1B STR1A ---0 rr01 ---0 rr01
297h
to
29Fh
— Unimplemented — —
Bank 6
30Ch
to
31Fh
— Unimplemented — —
Bank 7
38Ch
to
390h
— Unimplemented — —
391h IOCAP
— — IOCAP5 IOCAP4 IOCAP3 IOCAP2 IOCAP1 IOCAP0 --00 0000 --00 0000
392h IOCAN
— — IOCAN5 IOCAN4 IOCAN3 IOCAN2 IOCAN1 IOCAN0 --00 0000 --00 0000
393h IOCAF
— — IOCAF5 IOCAF4 IOCAF3 IOCAF2 IOCAF1 IOCAF0 --00 0000 --00 0000
394h
to
399h
— Unimplemented — —
39Ah CLKRCON CLKREN CLKROE CLKRSLR CLKRDC<1:0>
CLKRDIV <2:0> 0011 0000 0011 0000
39Bh
— Unimplemented — —
39Ch MDCON MDEN MDOE MDSLR MDOPOL MDOUT
— — MDBIT 0010 ---0 0010 ---0
39Dh MDSRC MDMSODIS
— — — MDMS<3:0> x--- xxxx u--- uuuu
39Eh MDCARL MDCLODIS MDCLPOL MDCLSYNC
— MDCL<3:0> xxx- xxxx uuu- uuuu
39Fh MDCARH MDCHODIS MDCHPOL MDCHSYNC
— MDCH<3:0> xxx- xxxx uuu- uuuu
TABLE 3-6: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on all
other
Resets
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Note 1: These registers can be addressed from any bank.
2: PIC12F1840 only.
3: Unimplemented, read as ‘1’.