Datasheet

PIC12(L)F1840
DS40001441D-page 22  2011-2013 Microchip Technology Inc.
TABLE 3-6: SPECIAL FUNCTION REGISTER SUMMARY
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on all
other
Resets
Bank 0
00Ch PORTA — — RA5 RA4 RA3 RA2 RA1 RA0 --xx xxxx --xx xxxx
00Dh
to
010h
— Unimplemented — —
011h PIR1 TMR1GIF ADIF RCIF TXIF SSP1IF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
012h PIR2 OSFIF
— C1IF EEIF BCL1IF — — — 0-00 0--- 0-00 0---
013h
— Unimplemented — —
014h
— Unimplemented — —
015h TMR0 Timer0 Module Register xxxx xxxx uuuu uuuu
016h TMR1L Holding Register for the Least Significant Byte of the 16-bit TMR1 Register xxxx xxxx uuuu uuuu
017h TMR1H Holding Register for the Most Significant Byte of the 16-bit TMR1 Register xxxx xxxx uuuu uuuu
018h T1CON TMR1CS1 TMR1CS0 T1CKPS<1:0> T1OSCEN T1SYNC
—TMR1ON0000 00-0 uuuu uu-u
019h T1GCON TMR1GE T1GPOL T1GTM T1GSPM T1GGO/
DONE
T1GVAL T1GSS<1:0> 0000 0x00 uuuu uxuu
01Ah TMR2 Timer2 Module Register 0000 0000 0000 0000
01Bh PR2 Timer2 Period Register 1111 1111 1111 1111
01Ch T2CON
— T2OUTPS<3:0> TMR2ON T2CKPS<1:0> -000 0000 -000 0000
01Dh
— Unimplemented — —
01Eh CPSCON0 CPSON CPSRM
— — CPSRNG<1:0> CPSOUT T0XCS 00-- 0000 00-- 0000
01Fh CPSCON1
— — — — — — CPSCH<1:0> ---- --00 ---- --00
Bank 1
08Ch TRISA — — TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 --11 1111 --11 1111
08Dh
to
090h
— Unimplemented — —
091h PIE1 TMR1GIE ADIE RCIE TXIE SSP1IE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
092h PIE2 OSFIE
— C1IE EEIE BCL1IE — — — 0-00 0--- 0-00 0---
093h
— Unimplemented — —
094h
— Unimplemented — —
095h
OPTION_REG WPUEN INTEDG TMR0CS TMR0SE PSA PS<2:0> 1111 1111 1111 1111
096h PCON STKOVF STKUNF
— —RMCLRRI POR BOR 00-- 11qq qq-- qquu
097h WDTCON
— — WDTPS<4:0> SWDTEN --01 0110 --01 0110
098h OSCTUNE
— — TUN<5:0> --00 0000 --00 0000
099h OSCCON SPLLEN IRCF<3:0>
—SCS<1:0>0011 1-00 0011 1-00
09Ah OSCSTAT T1OSCR PLLR OSTS HFIOFR HFIOFL MFIOFR LFIOFR HFIOFS 10q0 0q00 qqqq qq0q
09Bh ADRESL ADC Result Register Low xxxx xxxx uuuu uuuu
09Ch ADRESH ADC Result Register High xxxx xxxx uuuu uuuu
09Dh ADCON0
— CHS<4:0> GO/DONE ADON -000 0000 -000 0000
09Eh ADCON1 ADFM ADCS<2:0>
— — ADPREF<1:0> 0000 --00 0000 --00
09Fh
— Unimplemented — —
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Note 1: These registers can be addressed from any bank.
2: PIC12F1840 only.
3: Unimplemented, read as ‘1’.