Datasheet
2009 Microchip Technology Inc. Advance Information DS41406B-page 3
PIC12F1822/16F182X
FIGURE 1: 8-PIN DIAGRAM FOR PIC12F1822/LF1822
Note: Pin details are subject to change.
PDIP, SOIC, DFN
1
2
3
4
8
7
6
5
VDD
RA5
RA3
VSS
RA0
RA1
RA2
Note: See Table 2 for location of all peripheral functions.
RA4
PIC12F1822
PIC12LF1822
TABLE 2: 8-PIN ALLOCATION TABLE (PIC12F1822/LF1822)
I/O
8-Pin PDIP/SOIC/DFN
A/D
Reference
Cap Sense
Comparator
SR Latch
Timers
CCP
EUSART
MSSP
Interrupt
Modulator
Pull-up
Basic
RA0 7 AN0 DACOUT CPS0 C1IN+ — — P1B
(1)
TX
(1)
CK
(1)
SDO
(1)
SS
(1)
IOC MDOUT Y ICSPDAT/
ICDDAT
RA1 6 AN1 VREF CPS1 C1IN0- SRI — — RX
(1)
DT
(1)
SCL
SCK
IOC MDMIN Y ICSPCLK/
ICDCLK
RA2 5 AN2 — CPS2 C1OUT SRQ T0CKI CCP1
(1)
P1A
(1)
FLT0
— SDA
SDI
INT/
IOC
MDCIN1 Y —
RA3 4 — — — — — T1G
(1)
— —
SS
(1)
IOC — Y
MCLR
VPP
ICDMCLR
RA4 3 AN3 — CPS3 C1IN1- — T1G
(1)
T1OSO
P1B
(1)
TX
(1)
CK
(1)
SDO
(1)
IOC MDCIN2 Y OSC2
CLKOUT
CLKR
RA5 2 — — — — SRNQ T1CKI
T1OSI
CCP1
(1)
P1A
(1)
RX
(1)
DT
(1)
— IOC — Y OSC1
CLKIN
VDD 1 — — — — — — — — — — — — VDD
Vss8—— —— — — —— ———— VSS
Note 1: Pin functions can be assigned to one of two pin locations via software.