Datasheet

 2013-2015 Microchip Technology Inc. DS40001723D-page 85
PIC12(L)F1571/2
8.3 Register Definitions: Voltage Regulator Control
TABLE 8-1: SUMMARY OF REGISTERS ASSOCIATED WITH POWER-DOWN MODE
REGISTER 8-1: VREGCON: VOLTAGE REGULATOR CONTROL REGISTER
(1)
U-0 U-0 U-0 U-0 U-0 U-0 R/W-0/0 R/W-1/1
— — — — — —VREGPMReserved
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit
u = Bit is unchanged x = Bit is unknown U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set ‘0’ = Bit is cleared -n/n = Value at POR and BOR/Value at all other Resets
bit 7-2 Unimplemented: Read as ‘0’
bit 1 VREGPM: Voltage Regulator Power Mode Selection bit
1 = Low-Power Sleep mode enabled in Sleep
(2)
Draws lowest current in Sleep, slower wake-up.
0 = Normal power mode enabled in Sleep
(2)
Draws higher current in Sleep, faster wake-up.
bit 0 Reserved: Read as ‘1’, maintain this bit set
Note 1: PIC12F1571/2 only.
2: See Section 26.0 “Electrical Specifications”
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register on
Page
INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 74
IOCAF
— — IOCAF5 IOCAF4 IOCAF3 IOCAF2 IOCAF1 IOCAF0 122
IOCAN
— — IOCAN5 IOCAN4 IOCAN3 IOCAN2 IOCAN1 IOCAN0 121
IOCAP — — IOCAP5 IOCAP4 IOCAP3 IOCAP2 IOCAP1 IOCAP0 121
PIE1 TMR1GIE ADIE RCIE
(1)
TXIE
(1)
— — TMR2IE TMR1IE 75
PIE2
— —C1IE— — — — — 76
PIE3
— PWM3IE PWM2IE PWM1IE — — — — 77
PIR1 TMR1GIF ADIF RCIF
(1)
TXIF
(1)
— — TMR2IF TMR1IF 78
PIR2
— —C1IF— — — — — 79
PIR3
— PWM3IF PWM2IF PWM1IF — — — — 80
STATUS
— — —TOPD Z DC C 19
WDTCON
— — WDTPS<4:0> SWDTEN 89
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used in Power-Down mode.
Note 1: PIC12(L)F1572 only.