Datasheet

 2013-2015 Microchip Technology Inc. DS40001723D-page 81
PIC12(L)F1571/2
TABLE 7-1: SUMMARY OF REGISTERS ASSOCIATED WITH INTERRUPTS
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 74
OPTION_REG
WPUEN INTEDG TMR0CS TMR0SE PSA PS<2:0> 157
PIE1 TMR1GIE ADIE RCIE
(1)
TXIE
(1)
— — TMR2IE TMR1IE 75
PIE2
— —C1IE— — — — — 76
PIE3
— PWM3IE PWM2IE PWM1IE — — — — 77
PIR1 TMR1GIF ADIF RCIF
(1)
TXIF
(1)
— — TMR2IF TMR1IF 78
PIR2
— —C1IF— — — — — 79
PIR3
— PWM3IF PWM2IF PWM1IF — — — — 80
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by interrupts.
Note 1: PIC12(L)F1572 only.