Datasheet

 2013-2015 Microchip Technology Inc. DS40001723D-page 77
PIC12(L)F1571/2
REGISTER 7-4: PIE3: PERIPHERAL INTERRUPT ENABLE REGISTER 3
U-0 R/W-0/0 R/W-0/0 R/W-0/0 U-0 U-0 U-0 U-0
— PWM3IE PWM2IE PWM1IE — — — —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit
u = Bit is unchanged x = Bit is unknown U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set ‘0’ = Bit is cleared -n/n = Value at POR and BOR/Value at all other Resets
bit 7 Unimplemented: Read as ‘0’
bit 6 PWM3IE: PWM3 Interrupt Enable bit
1 = Enables the PWM3 interrupt
0 = Disables the PWM3 interrupt
bit 5 PWM2IE: PWM2 Interrupt Enable bit
1 = Enables the PWM2 interrupt
0 = Disables the PWM2 interrupt
bit 4 PWM1IE: PWM1 Interrupt Enable bit
1 = Enables the PWM1 interrupt
0 = Disables the PWM1 interrupt
bit 3-0 Unimplemented: Read as ‘0’
Note: Bit PEIE of the INTCON register must be
set to enable any peripheral interrupt.