Datasheet

PIC12(L)F1571/2
DS40001723D-page 76  2013-2015 Microchip Technology Inc.
REGISTER 7-3: PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2
U-0 U-0 R/W-0/0 U-0 U-0 U-0 U-0 U-0
— —C1IE— — — — —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit
u = Bit is unchanged x = Bit is unknown U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set ‘0’ = Bit is cleared -n/n = Value at POR and BOR/Value at all other Resets
bit 7-6 Unimplemented: Read as ‘0’
bit 5 C1IE: Comparator C1 Interrupt Enable bit
1 = Enables the Comparator C1 interrupt
0 = Disables the Comparator C1 interrupt
bit 4-0 Unimplemented: Read as ‘0’
Note: Bit PEIE of the INTCON register must be
set to enable any peripheral interrupt.