Datasheet

 2013-2015 Microchip Technology Inc. DS40001723D-page 75
PIC12(L)F1571/2
REGISTER 7-2: PIE1: PERIPHERAL INTERRUPT ENABLE REGISTER 1
R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 U-0 U-0 R/W-0/0 R/W-0/0
TMR1GIE ADIE RCIE
(1)
TXIE
(1)
— — TMR2IE TMR1IE
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit
u = Bit is unchanged x = Bit is unknown U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set ‘0’ = Bit is cleared -n/n = Value at POR and BOR/Value at all other Resets
bit 7 TMR1GIE: Timer1 Gate Interrupt Enable bit
1 = Enables the Timer1 gate acquisition interrupt
0 = Disables the Timer1 gate acquisition interrupt
bit 6 ADIE: Analog-to-Digital Converter (ADC) Interrupt Enable bit
1 = Enables the ADC interrupt
0 = Disables the ADC interrupt
bit 5 RCIE: USART Receive Interrupt Enable bit
(1)
1 = Enables the USART receive interrupt
0 = Disables the USART receive interrupt
bit 4 TXIE: USART Transmit Interrupt Enable bit
(1)
1 = Enables the USART transmit interrupt
0 = Disables the USART transmit interrupt
bit 3-2 Unimplemented: Read as ‘0’
bit 1 TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1 = Enables the Timer2 to PR2 match interrupt
0 = Disables the Timer2 to PR2 match interrupt
bit 0 TMR1IE: Timer1 Overflow Interrupt Enable bit
1 = Enables the Timer1 overflow interrupt
0 = Disables the Timer1 overflow interrupt
Note 1: PIC12(L)F1572 only.
2: Bit PEIE of the INTCON register must be set to enable any peripheral interrupt.
Note: Bit PEIE of the INTCON register must be
set to enable any peripheral interrupt.