Datasheet
PIC12(L)F1571/2
DS40001723D-page 66 2013-2015 Microchip Technology Inc.
6.13 Power Control (PCON) Register
The Power Control (PCON) register contains flag bits
to differentiate between a:
• Power-on Reset (POR
)
• Brown-out Reset (BOR)
• RESET Instruction Reset (RI
)
•MCLR Reset (RMCLR)
• Watchdog Timer Reset (RWDT
)
• Stack Underflow Reset (STKUNF)
• Stack Overflow Reset (STKOVF)
The PCON register bits are shown in Register 6-2.
6.14 Register Definitions: Power Control
REGISTER 6-2: PCON: POWER CONTROL REGISTER
R/W/HS-0/q R/W/HS-0/q U-0 R/W/HC-1/q R/W/HC-1/q R/W/HC-1/q R/W/HC-q/u R/W/HC-q/u
STKOVF STKUNF
—RWDTRMCLR RI POR BOR
bit 7 bit 0
Legend: HC = Hardware Clearable bit HS = Hardware Settable bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared q = Value depends on condition
bit 7 STKOVF: Stack Overflow Reset Flag bit
1 = A Stack Overflow Reset occurred
0 = A Stack Overflow Reset has not occurred or is cleared by firmware
bit 6 STKUNF: Stack Underflow Reset Flag bit
1 = A Stack Underflow Reset occurred
0 = A Stack Underflow Reset has not occurred or is cleared by firmware
bit 5 Unimplemented: Read as ‘0’
bit 4 RWDT
: Watchdog Timer Reset Flag bit
1 = A Watchdog Timer Reset has not occurred or is set by firmware
0 = A Watchdog Timer Reset has occurred (cleared by hardware)
bit 3 RMCLR
: MCLR Reset Flag bit
1 = A MCLR
Reset has not occurred or is set by firmware
0 = A MCLR
Reset has occurred (cleared by hardware)
bit 2 RI
: RESET Instruction Flag bit
1 = A RESET instruction has not been executed or set by firmware
0 = A RESET instruction has been executed (cleared by hardware)
bit 1 POR
: Power-on Reset Status bit
1 = No Power-on Reset occurred
0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
bit 0 BOR
: Brown-out Reset Status bit
1 = No Brown-out Reset occurred
0 = A Brown-out Reset occurred (must be set in software after a Power-on Reset or Brown-out Reset occurs)