Datasheet

 2013-2015 Microchip Technology Inc. DS40001723D-page 43
PIC12(L)F1571/2
REGISTER 4-2: CONFIG2: CONFIGURATION WORD 2
R/P-1 R/P-1 R/P-1 R/P-1 R/P-1 R/P-1
LVP
(1)
DEBUG
(2)
LPBOREN BORV
(3)
STVREN PLLEN
bit 13 bit 8
U-1 U-1 U-1 U-1 U-1 U-1 R/P-1 R/P-1
— — — — — —WRT<1:0>
bit 7 bit 0
Legend:
R = Readable bit P = Programmable bit U = Unimplemented bit, read as ‘1’
‘0’ = Bit is cleared ‘1’ = Bit is set n = Value when blank or after bulk erase
bit 13 LVP: Low-Voltage Programming Enable bit
(1)
1 = On – Low-voltage programming is enabled, MCLR/VPP pin function is MCLR; MCLRE
Configuration bit is ignored
0 = Off – High voltage on MCLR
/VPP must be used for programming
bit 12 DEBUG: Debugger Mode bit
(2)
1 = Off – In-Circuit Debugger is disabled; ICSPCLK and ICSPDAT are general purpose I/O pins
0 = On – In-Circuit Debugger is enabled; ICSPCLK and ICSPDAT are dedicated to the debugger
bit 11 LPBOREN
: Low-Power Brown-out Reset Enable bit
1 = Off – Low-power Brown-out Reset is disabled
0 = On – Low-power Brown-out Reset is enabled
bit 10 BORV: Brown-out Reset Voltage Selection bit
(3)
1 = Low – Brown-out Reset voltage (VBOR), low trip point selected
0 = High – Brown-out Reset voltage (V
BOR), high trip point selected
bit 9 STVREN: Stack Overflow/Underflow Reset Enable bit
1 = On – Stack overflow or underflow will cause a Reset
0 = Off – Stack overflow or underflow will not cause a Reset
bit 8 PLLEN: PLL Enable bit
1 = On – 4xPLL is enabled
0 = Off – 4xPLL is disabled
bit 7-2 Unimplemented: Read as ‘1’
bit 1-0 WRT<1:0>: Flash Memory Self-Write Protection bits
2 kW Flash Memory (
PIC12F1572):
11 = Off – Write protection is off
10 = Boot – 000h to 1FFh is write-protected, 200h to 7FFh may be modified by PMCON control
01 = Half – 000h to 3FFh is write-protected, 400h to 7FFh may be modified by PMCON control
00 = All – 000h to 7FFh is write-protected, no addresses may be modified by PMCON control
1 kW Flash Memory (
PIC12(L)F1571):
11 = Off – Write protection is off
10 = Boot – 000h to 0FFh is write-protected, 100h to 3FFh may be modified by PMCON control
01 = Half – 000h to 1FFh is write-protected, 200h to 3FFh may be modified by PMCON control
00 = All – 000h to 3FFh is write-protected, no addresses may be modified by PMCON control
Note 1: This bit cannot be programmed to ‘0’ when programming mode is entered via LVP.
2: The DEBUG
bit in Configuration Words is managed automatically by device development tools, including
debuggers and programmers. For normal device operation, this bit should be maintained as a ‘1’.
3: See V
BOR parameter for specific trip point voltages.