Datasheet

PIC12(L)F1571/2
DS40001723D-page 42  2013-2015 Microchip Technology Inc.
4.2 Register Definitions: Configuration Words
REGISTER 4-1: CONFIG1: CONFIGURATION WORD 1
U-1 U-1 R/P-1 R/P-1 R/P-1 U-1
— —CLKOUTEN BOREN<1:0>
(1)
—
bit 13 bit 8
R/P-1 R/P-1 R/P-1 R/P-1 R/P-1 U-1 R/P-1 R/P-1
CP
(2)
MCLRE PWRTE
(1)
WDTE<1:0> —FOSC<1:0>
bit 7 bit 0
Legend:
R = Readable bit P = Programmable bit U = Unimplemented bit, read as ‘1’
‘0’ = Bit is cleared ‘1’ = Bit is set n = Value when blank or after bulk erase
bit 13-12 Unimplemented: Read as ‘1’
bit 11 CLKOUTEN: Clock Out Enable bit
1 = Off – CLKOUT function is disabled; I/O or oscillator function on CLKOUT pin
0 =
On – CLKOUT function is enabled on CLKOUT pin
bit 10-9 BOREN<1:0>: Brown-out Reset Enable bits
(1)
11 = On – Brown-out Reset is enabled; the SBOREN bit is ignored
10 = Sleep – Brown-out Reset is enabled while running and disabled in Sleep; the SBOREN bit is ignored
01 =
SBODEN – Brown-out Reset is controlled by the SBOREN bit in the BORCON register
00 = Off – Brown-out Reset is disabled; the SBOREN bit is ignored
bit 8 Unimplemented: Read as ‘1’
bit 7 CP
: Flash Program Memory Code Protection bit
(2)
1 = Off – Code protection is off; program memory can be read and written
0 = On – Code protection is on; program memory cannot be read or written externally
bit 6 MCLRE: MCLR
/VPP Pin Function Select bit
If LVP bit =
1 ( On ):
This bit is ignored. MCLR/VPP pin function is MCLR; weak pull-up is enabled.
If LVP bit =
0 (Off):
1 = On – MCLR/VPP pin function is MCLR; weak pull-up is enabled
0 = Off – MCLR/VPP pin function is a digital input, MCLR is internally disabled; weak pull-up is under control
of pin’s WPU control bit
bit 5 PWRTE
: Power-up Timer Enable bit
(1)
1 = Off – PWRT is disabled
0 =
On – PWRT is enabled
bit 4-3 WDTE<1:0>: Watchdog Timer Enable bits
11 =
On – WDT is enabled; SWDTEN is ignored
10 = Sleep – WDT is enabled while running and disabled in Sleep; SWDTEN is ignored
01 =
SWDTEN – WDT is controlled by the SWDTEN bit in the WDTCON register
00 = Off – WDT is disabled; SWDTEN is ignored
bit 2 Unimplemented: Read as ‘1’
bit 1-0 FOSC<1:0>: Oscillator Selection bits
11 = ECH – External Clock, High-Power mode: CLKI on CLKI
10 = ECM – External Clock, Medium Power mode: CLKI on CLKI
01 =
ECL – External Clock, Low-Power mode: CLKI on CLKI
00 = INTOSC – I/O function on CLKI
Note 1: Enabling Brown-out Reset does not automatically enable the Power-up Timer.
2: Once enabled, code-protect can only be disabled by bulk erasing the device.