Datasheet
PIC12(L)F1571/2
DS40001723D-page 28 2013-2015 Microchip Technology Inc.
Bank 2
10Ch LATA — — LATA<5:4> — LATA<2:0>
--xx -xxx --uu -uuu
10Dh — Unimplemented — —
10Eh
— Unimplemented — —
10Fh
— Unimplemented — —
110h
— Unimplemented — —
111h CM1CON0 C1ON C1OUT C1OE C1POL
— C1SP C1HYS C1SYNC
0000 -100 0000 -100
112h CM1CON1 C1INTP C1INTN C1PCH<1:0> —C1NCH<2:0>
0000 -000 0000 -000
113h — Unimplemented — —
114h
— Unimplemented — —
115h CMOUT
— — — — — — —MC1OUT
---- ---0 ---- ---0
116h BORCON SBOREN BORFS — — — — — BORRDY
10-- ---q uu-- ---u
117h FVRCON FVREN FVRRDY TSEN TSRNG CDAFVR<1:0> ADFVR<1:0>
0q00 0000 0q00 0000
118h DAC1CON0 DACEN —DACOE — DACPSS<1:0> — —
0-0- 00-- 0-0- 00--
119h DAC1CON1 — — — DACR<4:0>
---0 0000 ---0 0000
11Ah
to
11Ch
— Unimplemented — —
11Dh APFCON RXDTSEL CWGASEL CWGBSEL
— T1GSEL TXCKSEL P2SEL P1SEL
000- 0000 000- 0000
11Eh — Unimplemented — —
11Fh
— Unimplemented — —
Bank 3
18Ch ANSELA — — —ANSA4— ANSA<2:0>
---1 -111 ---1 -111
18Dh — Unimplemented — —
18Eh
— Unimplemented — —
18Fh
— Unimplemented — —
190h
— Unimplemented — —
191h PMADRL Flash Program Memory Address Register Low Byte
0000 0000 0000 0000
192h PMADRH —
(3)
Flash Program Memory Address Register High Byte
1000 0000 1000 0000
193h PMDATL Flash Program Memory Read Data Register Low Byte
xxxx xxxx uuuu uuuu
194h PMDATH — — Flash Program Memory Read Data Register High Byte
--xx xxxx --uu uuuu
195h PMCON1 —
(3)
CFGS LWLO FREE WRERR WREN WR RD
1000 x000 1000 q000
196h PMCON2 Flash Program Memory Control Register 2
0000 0000 0000 0000
197h VREGCON
(1)
— — — — — —VREGPMReserved
---- --01 ---- --01
198h — Unimplemented — —
199h RCREG USART Receive Data Register
0000 0000 0000 0000
19Ah TXREG USART Transmit Data Register
0000 0000 0000 0000
19Bh SPBRGL Baud Rate Generator Data Register Low
0000 0000 0000 0000
19Ch SPBRGH Baud Rate Generator Data Register High
0000 0000 0000 0000
19Dh RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D
0000 000x 0000 000x
19Eh TXSTA CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D
0000 0010 0000 0010
19Fh BAUDCON ABDOVF RCIDL — SCKP BRG16 — WUE ABDEN
01-0 0-00 01-0 0-00
TABLE 3-10: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on
All Other
Resets
Legend:
x
= unknown;
u
= unchanged;
q
= value depends on condition; — = unimplemented;
r
= reserved. Shaded locations are unimplemented, read as ‘
0
’.
Note 1:
PIC12F1571/2 only.
2:
PIC12(L)F1572 only.
3:
Unimplemented, read as ‘
1
’.