Datasheet

PIC12(L)F1571/2 DS40001723D-page 24  2013-2015 Microchip Technology Inc.
TABLE 3-6: PIC12(L)F1571/2 MEMORY MAP, BANK 24-31
BANK 24 BANK 25 BANK 26 BANK 27 BANK 28 BANK 29 BANK 30 BANK 31
C00h
C0Bh
Core Registers
(Table 3 -2)
C80h
C8Bh
Core Registers
(Table 3 -2)
D00h
D0Bh
Core Registers
(Table 3 -2)
D80h
D8Bh
Core Registers
(Table 3 -2)
E00h
E0Bh
Core Registers
(Table 3-2)
E80h
E8Bh
Core Registers
(Table 3-2)
F00h
F0Bh
Core Registers
(Table 3-2)
F80h
F8Bh
Core Registers
(Table 3-2)
C0Ch
—C8Ch—D0Ch—D8Ch
See Ta ble 3 -7 for
Register Mapping
Details
E0Ch —E8Ch—F0Ch—F8Ch
See Ta bl e 3 -7 for
Register Mapping
Details
C0Dh —C8Dh—D0Dh—E0Dh—E8Dh—F0Dh—
C0Eh
—C8Eh—D0Eh—E0Eh—E8Eh—F0Eh—
C0Fh
—C8Fh—D0Fh—E0Fh—E8Fh—F0Fh—
C10h
—C90h—D10h—E10h—E90h—F10h—
C11h
—C91h—D11h—E11h—E91h—F11h—
C12h
—C92h—D12h—E12h—E92h—F12h—
C13h
—C93h—D13h—E13h—E93h—F13h—
C14h
—C94h—D14h—E14h—E94h—F14h—
C15h
—C95h—D15h—E15h—E95h—F15h—
C16h
—C96h—D16h—E16h—E96h—F16h—
C17h
—C97h—D17h—E17h—E97h—F17h—
C18h
—C98h—D18h—E18h—E98h—F18h—
C19h
—C99h—D19h—E19h—E99h—F19h—
C1Ah
—C9Ah—D1Ah—E1Ah—E9Ah—F1Ah—
C1Bh
—C9Bh—D1Bh—E1Bh—E9Bh—F1Bh—
C1Ch
—C9Ch—D1Ch—E1Ch—E9Ch—F1Ch—
C1Dh
—C9Dh—D1Dh—E1Dh—E9Dh—F1Dh—
C1Eh
—C9Eh—D1Eh—E1Eh—E9Eh—F1Eh—
C1Fh
—C9Fh—D1Fh—E1Fh—E9Fh—F1Fh—
C20h
Unimplemented
Read as ‘0’
CA0h
Unimplemented
Read as ‘0’
D20h
Unimplemented
Read as ‘0’
E20h
Unimplemented
Read as ‘0’
EA0h
Unimplemented
Read as ‘0’
F20h
Unimplemented
Read as ‘0’
C6Fh CEFh D6Fh DEFh E6Fh EEFh F6Fh FEFh
C70h
Accesses
70h-7Fh
CF0h
Accesses
70h-7Fh
D70h
Accesses
70h-7Fh
DF0h
Accesses
70h-7Fh
E70h
Accesses
70h-7Fh
EF0h
Accesses
70h-7Fh
F70h
Accesses
70h-7Fh
FF0h
Accesses
70h-7Fh
CFFh CFFh D7Fh DFFh E7Fh EFFh F7Fh FFFh
Legend: = Unimplemented data memory locations, read as ‘0’.