Datasheet
PIC12(L)F1571/2
DS40001723D-page 22 2013-2015 Microchip Technology Inc.
TABLE 3-4: PIC12(L)F1572 MEMORY MAP, BANK 0-7
BANK 0 BANK 1 BANK 2 BANK 3 BANK 4 BANK 5 BANK 6 BANK 7
000h
Core Registers
(Table 3 -2)
080h
Core Registers
(Table 3 -2)
100h
Core Registers
(Table 3 -2)
180h
Core Registers
(Table 3 -2)
200h
Core Registers
(Table 3-2)
280h
Core Registers
(Table 3-2)
300h
Core Registers
(Table 3-2)
380h
Core Registers
(Table 3-2)
00Bh
08Bh 10Bh 18Bh 20Bh 28Bh 30Bh 38Bh
00Ch
PORTA 08Ch TRISA 10Ch LATA 18Ch ANSELA 20Ch WPUA 28Ch ODCONA 30Ch SLRCONA 38Ch INLVLA
00Dh
—08Dh—10Dh—18Dh—20Dh—28Dh—30Dh—38Dh—
00Eh
—08Eh—10Eh—18Eh—20Eh—28Eh—30Eh—38Eh—
00Fh
—08Fh—10Fh—18Fh— 20Fh — 28Fh — 30Fh — 38Fh —
010h
—090h—110h—190h— 210h — 290h — 310h — 390h —
011h
PIR1 091h PIE1 111h CM1CON0 191h PMADRL 211h
— 291h — 311h — 391h IOCAP
012h
PIR2 092h PIE2 112h CM1CON1 192h PMADRH 212h
— 292h — 312h — 392h IOCAN
013h
PIR3 093h PIE3 113h
— 193h PMDATL 213h — 293h — 313h — 393h IOCAF
014h
—094h—114h— 194h PMDATH 214h — 294h — 314h — 394h —
015h
TMR0 095h OPTION_REG 115h CMOUT 195h PMCON1 215h
— 295h — 315h — 395h —
016h
TMR1L 096h PCON 116h BORCON 196h PMCON2 216h
— 296h — 316h — 396h —
017h
TMR1H 097h WDTCON 117h FVRCON 197h VREGCON
(1)
217h — 297h — 317h — 397h —
018h
T1CON 098h OSCTUNE 118h DAC1CON0 198h
— 218h — 298h — 318h — 398h —
019h
T1GCON 099h OSCCON 119h DAC1CON1 199h RCREG 219h
— 299h — 319h — 399h —
01Ah
TMR2 09Ah OSCSTAT 11Ah
— 19Ah TXREG 21Ah —29Ah—31Ah—39Ah—
01Bh
PR2 09Bh ADRESL 11Bh
— 19Bh SPBRG 21Bh —29Bh—31Bh—39Bh—
01Ch
T2CON 09Ch ADRESH 11Ch
— 19Ch SPBRGH 21Ch —29Ch—31Ch—39Ch—
01Dh
— 09Dh ADCON0 11Dh APFCON 19Dh RCSTA 21Dh —29Dh—31Dh—39Dh—
01Eh
— 09Eh ADCON1 11Eh — 19Eh TXSTA 21Eh —29Eh—31Eh—39Eh—
01Fh
— 09Fh ADCON2 11Fh — 19Fh BAUDCON 21Fh — 29Fh — 31Fh — 39Fh —
020h
General
Purpose
Register
80 Bytes
0A0h
General
Purpose
Register
80 Bytes
120h
General
Purpose
Register
80 Bytes
1A0h
Unimplemented
Read as ‘0’
220h
Unimplemented
Read as ‘0’
2A0h
Unimplemented
Read as ‘0’
320h
Unimplemented
Read as ‘0’
3A0h
Unimplemented
Read as ‘0’
0EFh
06Fh
16Fh 1EFh 26Fh 2EFh
36Fh 3EFh
070h
Common RAM
0F0h
Accesses
70h-7Fh
170h
Accesses
70h-7Fh
1F0h
Accesses
70h-7Fh
270h
Accesses
70h-7Fh
2F0h
Accesses
70h-7Fh
370h
Accesses
70h-7Fh
3F0h
Accesses
70h-7Fh
07Fh
0FFh 17Fh 1FFh 27Fh 2FFh 37Fh 3FFh
Legend: = Unimplemented data memory locations, read as ‘0’.
Note 1: PIC12F1572 only.