Datasheet

PIC12(L)F1571/2
DS40001723D-page 20  2013-2015 Microchip Technology Inc.
3.3.2 SPECIAL FUNCTION REGISTER
The Special Function Registers are registers used by
the application to control the desired operation of
peripheral functions in the device. The Special Function
Registers occupy the 20 bytes after the core registers of
every data memory bank (addresses: x0Ch/x8Ch
through x1Fh/x9Fh). The registers associated with the
operation of the peripherals are described in the
appropriate peripheral chapter of this data sheet.
3.3.3 GENERAL PURPOSE RAM
There are up to 80 bytes of GPR in each data memory
bank. The Special Function Registers occupy the
20 bytes after the core registers of every data memory
bank (addresses: x0Ch/x8Ch through x1Fh/x9Fh).
3.3.3.1 Linear Access to GPR
The general purpose RAM can be accessed in
a non-banked method via the FSRs. This can
simplify access to large memory structures. See
Section 3.6.2 “Linear Data Memory” for more
information.
3.3.4 COMMON RAM
There are 16 bytes of common RAM accessible from all
banks.
3.3.5 DEVICE MEMORY MAPS
The memory maps for PIC12(L)F1571/2 are as shown
in Table 3-3 through Tab le 3-8 .
FIGURE 3-3: BANKED MEMORY
PARTITIONING
Memory Region7-bit Bank Offset
00h
0Bh
0Ch
1Fh
20h
6Fh
7Fh
70h
Core Registers
(12 bytes)
Special Function Registers
(20 bytes maximum)
General Purpose RAM
(80 bytes maximum)
Common RAM
(16 bytes)
Rev. 10-000041A
7/30/2013