Datasheet

2013-2015 Microchip Technology Inc. DS40001723D-page 197
PIC12(L)F1571/2
FIGURE 21-10: SYNCHRONOUS TRANSMISSION
FIGURE 21-11: SYNCHRONOUS TRANSMISSION (THROUGH TXEN)
TABLE 21-7: SUMMARY OF REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER
TRANSMISSION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
BAUDCON
ABDOVF RCIDL SCKP BRG16 WUE ABDEN 186
INTCON GIE PEIE
TMR0IE INTE IOCIE TMR0IF INTF IOCIF 74
PIE1
TMR1GIE ADIE RCIE
(1)
TXIE
(1)
TMR2IE TMR1IE 75
PIR1
TMR1GIF ADIF RCIF
(1)
TXIF
(1)
TMR2IF TMR1IF 78
RCSTA SPEN
RX9 SREN CREN ADDEN FERR OERR RX9D 185
SPBRGL BRG<7:0> 187*
SPBRGH BRG<15:8> 187*
TXREG
EUSART Transmit Data Register 177*
TXSTA CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D 184
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used for synchronous master transmission.
* Page provides register information.
Note 1: PIC12(L)F1572 only.
bit 0 bit 1 bit 7
Word 1
bit 2 bit 0 bit 1 bit 7
RX/DT
Write to
TXREG Reg
TXIF bit
(Interrupt Flag)
TXEN bit
1
1
Word 2
TRMT bit
Write Word 1 Write Word 2
Note: Sync Master mode, SPBRGL = 0, continuous transmission of two 8-bit words.
Pin
TX/CK Pin
TX/CK Pin
(SCKP =
0
)
(SCKP =
1
)
RX/DT Pin
TX/CK Pin
Write to
TXREG Reg.
TXIF bit
TRMT bit
bit 0 bit 1 bit 2 bit 6 bit 7
TXEN bit