Datasheet

 2013-2015 Microchip Technology Inc. DS40001723D-page 159
PIC12(L)F1571/2
19.0 TIMER1 MODULE WITH GATE
CONTROL
The Timer1 module is a 16-bit timer/counter with the
following features:
• 16-bit Timer/Counter register pair (TMR1H:TMR1L)
• Programmable internal or external clock source
• 2-bit prescaler
• Optionally synchronized comparator out
• Multiple Timer1 gate (count enable) sources
• Interrupt on overflow
• Wake-up on overflow (external clock,
Asynchronous mode only)
• ADC auto-conversion trigger(s)
• Selectable gate source polarity
• Gate Toggle mode
• Gate Single-Pulse mode
• Gate value status
• Gate event interrupt
Figure 19-1 is a block diagram of the Timer1 module.
FIGURE 19-1: TIMER1 BLOCK DIAGRAM
00
11
10
01
T1G
T0_overflow
C1OUT_sync
Reserved
T1GSS<1:0>
T1GPOL
0
1
Single Pulse
Acq. Control
1
0
T1GSPM
TMR1ON
T1GTM
TMR1GE
TMR1ON
DQ
EN
TMR1LTMR1H
T1_overflow
set flag bit
TMR1IF
TMR1
(2)
1
0
Fosc
Internal Clock
Fosc/4
Internal Clock
LFINTOSC
TMR1CS<1:0>
00
11
10
01
Prescaler
1,2,4,8
T1SYNC
Sleep
Input
Fosc/2
Internal
Clock
T1CKPS<1:0>
Synchronized Clock Input
2
det
Synchronize
(3)
1: ST Buffer is high speed type when using T1CKI.
2: Timer1 register increments on rising edge.
3: Synchronize does not operate while in Sleep.
(1)
D
QCK
R
Q
Note
T1GGO/DONE
T1CLK
T1CKI
DQ
set bit
TMR1GIF
T1GVAL
Q1
det
Interrupt
Rev. 10-000018D
8/5/2013