Datasheet

PIC12(L)F1571/2
DS40001723D-page 130 2013-2015 Microchip Technology Inc.
15.1 ADC Configuration
When configuring and using the ADC the following
functions must be considered:
Port configuration
Channel selection
ADC voltage reference selection
ADC conversion clock source
Interrupt control
Result formatting
15.1.1 PORT CONFIGURATION
The ADC can be used to convert both analog and
digital signals. When converting analog signals, the I/O
pin should be configured for analog by setting the
associated TRISx and ANSELx bits. Refer to
Section 11.0 “I/O Ports” for more information.
15.1.2 CHANNEL SELECTION
There are 7 channel selections available:
AN<3:0> pins
Temperature Indicator
DAC1_output
FVR_buffer1
The CHS bits of the ADCON0 register determine which
channel is connected to the sample and hold circuit.
When changing channels, a delay (T
ACQ) is required
before starting the next conversion. Refer to
Section 15.2.6 “ADC Conversion Procedure” for
more information.
15.1.3 ADC VOLTAGE REFERENCE
The ADC module uses a positive and a negative
voltage reference. The positive reference is labeled
ref+ and the negative reference is labeled ref-.
The positive voltage reference (ref+) is selected by the
ADPREFx bits in the ADCON1 register. The positive
voltage reference source can be:
•V
REF+ pin
•V
DD
The negative voltage reference (ref-) source is:
•V
SS
15.1.4 CONVERSION CLOCK
The source of the conversion clock is software-selectable
via the ADCSx bits of the ADCON1 register. There are
seven possible clock options:
•F
OSC/2
•F
OSC/4
•FOSC/8
•FOSC/16
•F
OSC/32
•FOSC/64
FRC (internal Fast RC oscillator)
The time to complete one bit conversion is defined as
T
AD. One full 10-bit conversion requires 11.5 TAD
periods, as shown in Figure 15-2.
For correct conversion, the appropriate T
AD specification
must be met. Refer to the ADC conversion requirements
in Section 26.0 “Electrical Specifications” for more
information. Table 15-1 gives examples of appropriate
ADC clock selections.
Note: Analog voltages on any pin that is defined
as a digital input may cause the input
buffer to conduct excess current.
Note: Unless using the FRC, any changes in the
system clock frequency will change the
ADC clock frequency, which may
adversely affect the ADC result.