Datasheet

PIC12(L)F1571/2

DS40001723D-page 122  2013-2015 Microchip Technology Inc.

TABLE 12-1: SUMMARY OF REGISTERS ASSOCIATED WITH INTERRUPT-ON-CHANGE

U-0 U-0 R/W/HS-0/0 R/W/HS-0/0 R/W/HS-0/0 R/W/HS-0/0 R/W/HS-0/0 R/W/HS-0/0

— —IOCAF<5:0>

bit 7 bit 0

Legend:

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set ‘0’ = Bit is cleared HS - Bit is set in hardware

bit 7-6 Unimplemented: Read as ‘0’

bit 5-0 IOCAF<5:0>: Interrupt-On-Change PORTA Flag bits

1 = An enabled change was detected on the associated pin

Set when IOCAPx = 1 and a rising edge was detected on RAx, or when IOCANx = 1 and a falling

edge was detected on RAx.

0 = No change was detected or the user cleared the detected change

Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

on Page

ANSELA

— — —ANSA4— ANSA<2:0> 114

INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 74

IOCAF

— —IOCAF<5:0>122

IOCAN — —IOCAN<5:0>121

IOCAP — — IOCAP<5:0> 121

TRISA

— — TRISA<5:4> —

(1)

TRISA<2:0> 113

Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by Interrupt-On-Change.

Note 1: Unimplemented, read as ‘1’.