Datasheet

2013-2015 Microchip Technology Inc. DS40001723D-page 115
PIC12(L)F1571/2
REGISTER 11-6: WPUA: WEAK PULL-UP PORTA REGISTER
U-0 U-0 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1
WPUA<5:0>
(1,2,3)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit
u = Bit is unchanged x = Bit is unknown U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set ‘0’ = Bit is cleared -n/n = Value at POR and BOR/Value at all other Resets
bit 7-6 Unimplemented: Read as ‘0
bit 5-0 WPUA<5:0>: Weak Pull-up Register bits
(1,2,3)
1 = Pull-up is enabled
0 = Pull-up is disabled
Note 1: Global WPUEN
bit of the OPTION_REG register must be cleared for individual pull-ups to be enabled.
2: The weak pull-up device is automatically disabled if the pin is configured as an output.
3: For the WPUA3 bit, when MCLRE = 1, the weak pull-up is internally enabled, but not reported here.
REGISTER 11-7: ODCONA: PORTA OPEN-DRAIN CONTROL REGISTER
U-0 U-0 R/W-0/0 R/W-0/0 U-0 R/W-0/0 R/W-0/0 R/W-0/0
—ODA<5:4>—ODA<2:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit
u = Bit is unchanged x = Bit is unknown U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set ‘0’ = Bit is cleared -n/n = Value at POR and BOR/Value at all other Resets
bit 7-6 Unimplemented: Read as ‘0
bit 5-4 ODA<5:4>: PORTA Open-Drain Enable bits
For RA<5:4> Pins, Respectively:
1 = Port pin operates as open-drain drive (sink current only)
0 = Port pin operates as standard push-pull drive (source and sink current)
bit 3 Unimplemented: Read as ‘0
bit 2-0 ODA<2:0>: PORTA Open-Drain Enable bits
For RA<2:0> Pins, Respectively:
1 = Port pin operates as open-drain drive (sink current only)
0 = Port pin operates as standard push-pull drive (source and sink current)