Datasheet

ManualsBrandsMICROCHIP TECHNOLOGY ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller DFN 8 (2x3) 8-Bit 20 MHz I/O number 5

 2012-2013 Microchip Technology Inc. DS80000539D-page 3

PIC12(L)F1501

Silicon Errata Issues

1. Module: Oscillator

1.1 OSCSTAT bits: HFIOFR and HFIOFS

When HFINTOSC is selected, the HFIOFR and

HFIOFS bits will become set when the oscillator

becomes ready and stable. Once these bits are

set, they become “stuck”, indicating that

HFINTOSC is always ready and stable. If the

HFINTOSC is disabled, the bits fail to be cleared.

Work around

None.

Affected Silicon Revisions

1.2 Clock Switching

When switching clock sources between INTOSC

clock source and an external clock source, one

corrupted instruction may be executed after the

switch occurs.

Work around

When switching from an external oscillator clock

source, first switch to 16 MHz HFINTOSC. Once

running at 16 MHz HFINTOSC, configure IRCF to

run at desired internal oscillator frequency.

When switching from an internal oscillator

(INTOSC) to an external oscillator clock source,

first switch to HFINTOSC High-Power mode

(8 MHz or 16 MHz). Once running from

HFINTOSC, switch to the external oscillator clock

source.

Affected Silicon Revisions

2. Module: FVR

2.1 FVR Module

When using the FVR module, if the gain amplifier

outputs are set via the CDAFVR or ADFVR bits in

FVRCON while the module is disabled

(FVREN = 0), the internal oscillator frequency may

shift, device current consumption can increase,

and a Brown-out Reset may occur. Additionally,

after the FVREN is enabled, a switch from 4x to 1x

can also cause a Reset.

Work around

Set the FVREN bit of FVRCON to enable the

module prior to adjusting the amplifier output

selections with the CDAFVR and ADFVR bits.

Always set the amplifier output selections to off

(‘0 0’) before disabling the FVR module. When

switching from 4x to 1x, first switch from 4x to 2x

and then from 2x to 1x.

Affected Silicon Revisions

Note: This document summarizes all silicon

errata issues from all revisions of silicon,

previous as well as current. Only the

issues indicated by the shaded column in

the following tables apply to the current

silicon revision (A3).

A0 A2

A0 A2 A3