Datasheet
1997-2013 Microchip Technology Inc. DS30561C-page 75
PIC12C67X
CLRWDT Clear Watchdog Timer
Syntax: [
label
] CLRWDT
Operands: None
Operation: 00h WDT
0 WDT prescaler,
1 TO
1 PD
Status Affected: TO, PD
Encoding:
00 0000 0110 0100
Description: CLRWDT instruction resets the
Watchdog Timer. It also resets the
prescaler of the WDT. Status bits
TO and PD are set.
Words: 1
Cycles: 1
Example
CLRWDT
Before Instruction
WDT counter = ?
After Instruction
WDT counter = 0x00
WDT prescaler= 0
TO =1
PD =1
COMF Complement f
Syntax: [
label
] COMF f,d
Operands: 0 f 127
d [0,1]
Operation: (f
) (dest)
Status Affected: Z
Encoding:
00 1001 dfff ffff
Description: The contents of register 'f' are
complemented. If 'd' is 0, the
result is stored in W. If 'd' is 1, the
result is stored back in register 'f'.
Words: 1
Cycles: 1
Example
COMF REG1,0
Before Instruction
REG1 = 0x13
After Instruction
REG1 = 0x13
W=0xEC
DECF Decrement f
Syntax: [
label
] DECF f,d
Operands: 0 f 127
d [0,1]
Operation: (f) - 1 (dest)
Status Affected: Z
Encoding:
00 0011 dfff ffff
Description: Decrement register 'f'. If 'd' is 0,
the result is stored in the W regis-
ter. If 'd' is 1, the result is stored
back in register 'f'.
Words: 1
Cycles: 1
Example
DECF CNT,
1
Before Instruction
CNT = 0x01
Z=0
After Instruction
CNT = 0x00
Z=1
DECFSZ Decrement f, Skip if 0
Syntax: [
label
] DECFSZ f,d
Operands: 0 f 127
d [0,1]
Operation: (f) - 1 (dest); skip if result = 0
Status Affected: None
Encoding:
00 1011 dfff ffff
Description: The contents of register 'f' are
decremented. If 'd' is 0, the result
is placed in the W register. If 'd' is
1, the result is placed back in reg-
ister 'f'.
If the result is 0, the next instruc-
tion, which is already fetched, is
discarded. A NOP is executed
instead making it a two cycle
instruction.
Words: 1
Cycles: 1(2)
Example
HERE DECFSZ CNT, 1
GOTO LOOP
CONTINUE •
•
•
Before Instruction
PC = address HERE
After Instruction
CNT = CNT - 1
if CNT = 0,
PC = address CONTINUE
if CNT 0,
PC = address HERE+1