Information

PIC12C67X
DS80067C-page 6  2001 Microchip Technology Inc.
FIGURE 5-2: GP2 Block Diagram
FIGURE 5-3: GP3 Block Diagram
FIGURE 5-4: GP4 Block Diagram
FIGURE 5-5: GP5 Block Diagram
I/O Pin
VDD
VSS
D
Q
CK
Q
D
Q
CK
Q
D
EN
Q
Analog
Input
Mode
Data bus
WR
PORT
WR
TRIS
RD
TRIS
To A/D Converter
GP2/INT
TMR0 Clock Input
RD
PORT
I/O Pin
VDD
VSS
D
EN
Q
D
EN
Q
Data bus
RD PORT
RD
PORT
RD
TRIS
GPPU
VSS
VDD
Weak
MCLREN
MCLR
Interrupt-on-Change
I/O Pin
VDD
VSS
D
Q
CK
Q
D
Q
CK
Q
D
EN
Q
Analog
Input
Mode
Data bus
WR
PORT
WR
TRIS
RD
TRIS
To A/D Converter
RD
PORT
0
1
Fosc/4
CLKOUT
Enable
INTRC/
EXTRC
To OSC1
Oscillator
Circuit
VDD
VSS
D
Q
CK
Q
D
Q
CK
Q
D
EN
Q
Data bus
WR
PORT
WR
TRIS
RD
TRIS
RD
PORT
INTRC
To OSC2
Oscillator
Circuit