Datasheet

PIC12C67X
DS30561C-page 8  1997-2013 Microchip Technology Inc.
FIGURE 3-1: PIC12C67X BLOCK DIAGRAM
Power-up
Timer
Oscillator
Start-up Timer
EPROM
Program
Memory
13
Data Bus
8
14
Program
Bus
Instruction reg
Program Counter
RAM
File
Registers
Direct Addr
7
RAM Addr
(1)
9
Addr MUX
Indirect
Addr
FSR reg
STATUS reg
MUX
ALU
W reg
Instruction
Decode &
Control
Timing
Generation
OSC1/CLKIN
OSC2/CLKOUT
MCLR
VDD, VSS
Timer0
GPIO
8
8
GP4/OSC2/AN3/CLKOUT
GP3/MCLR/VPP
GP2/T0CKI/AN2/INT
GP1/AN1/VREF
GP0/AN0
8
3
GP5/OSC1/CLKIN
8 Level Stack
(13 bit)
128 bytes
Note 1: Higher order bits are from the STATUS Register.
A/D
Watchdog
Timer
Power-on
Reset
4 MHz Clock
Internal
Data
Memory
16x8
EEPROM
SCL
SDA
Device Program Memory Data Memory (RAM) Non-Volatile Memory (EEPROM)
PIC12C671 1K x 14 128 x 8 —
PIC12C672 2K x 14 128 x 8 —
PIC12CE673 1K x 14 128 x 8 16 x 8
PIC12CE674 2K x 14 128 x 8 16 x 8
PIC12CE673
PIC12CE674