Datasheet

PIC12C67X
DS30561C-page 74  1997-2013 Microchip Technology Inc.
BTFSS Bit Test f, Skip if Set
Syntax: [
label ] BTFSS f,b
Operands: 0  f  127
0  b < 7
Operation: skip if (f<b>) = 1
Status Affected: None
Encoding:
01 11bb bfff ffff
Description: If bit 'b' in register 'f' is '1', then the
next instruction is skipped.
If bit 'b' is '1', then the next instruc-
tion fetched during the current
instruction execution, is discarded
and a NOP is executed instead,
making this a 2 cycle instruction.
Words: 1
Cycles: 1(2)
Example
HERE
FALSE
TRUE
BTFSS
GOTO
•
•
•
FLAG,1
PROCESS_CO
DE
Before Instruction
PC = address HERE
After Instruction
if FLAG<1> = 0,
PC = address FALSE
if FLAG<1> = 1,
PC = address TRUE
CALL Call Subroutine
Syntax: [
label ] CALL k
Operands: 0  k  2047
Operation: (PC)+ 1 TOS,
k  PC<10:0>,
(PCLATH<4:3>)  PC<12:11>
Status Affected: None
Encoding:
10 0kkk kkkk kkkk
Description: Call Subroutine. First, return
address (PC+1) is pushed onto
the stack. The eleven bit immedi-
ate address is loaded into PC bits
<10:0>. The upper bits of the PC
are loaded from PCLATH. CALL is
a two cycle instruction.
Words: 1
Cycles: 2
Example
HERE CALL
THER
E
Before Instruction
PC = Address HERE
After Instruction
PC = Address THERE
TOS = Address HERE+1
CLRF Clear f
Syntax: [
label ] CLRF f
Operands: 0  f  127
Operation: 00h  (f)
1  Z
Status Affected: Z
Encoding:
00 0001 1fff ffff
Description: The contents of register 'f' are
cleared and the Z bit is set.
Words: 1
Cycles: 1
Example
CLRF FLAG_REG
Before Instruction
FLAG_REG = 0x5A
After Instruction
FLAG_REG = 0x00
Z=1
CLRW Clear W
Syntax: [
label ] CLRW
Operands: None
Operation: 00h  (W)
1  Z
Status Affected: Z
Encoding:
00 0001 0000 0011
Description: W register is cleared. Zero bit (Z)
is set.
Words: 1
Cycles: 1
Example
CLRW
Before Instruction
W = 0x5A
After Instruction
W = 0x00
Z=1