Datasheet

PIC12C67X
DS30561C-page 52  1997-2013 Microchip Technology Inc.
FIGURE 8-4: FLOWCHART OF A/D OPERATION
TABLE 8-2: SUMMARY OF A/D REGISTERS
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
Power-on
Reset
Value on
all other
Resets
0Bh/8Bh INTCON
(1)
GIE PEIE T0IE INTE GPIE T0IF INTF GPIF 0000 000x 0000 000u
0Ch
PIR1
—ADIF — — — — — — -0-- ---- -0-- ----
8Ch
PIE1
—ADIE — — — — — — -0-- ---- -0-- ----
1Eh
ADRES A/D Result Register xxxx xxxx uuuu uuuu
1Fh
ADCON0 ADCS1 ADCS0
reserved CHS1 CHS0 GO/DONE reserved ADON 0000 0000 0000 0000
9Fh
ADCON1
— — — — — PCFG2 PCFG1 PCFG0 ---- -000 ---- -000
05h GPIO SCL
(2)
SDA
(2)
GP5 GP4 GP3 GP2 GP1 GP0
11xx xxxx 11uu uuuu
85h TRIS
— — TRIS5 TRIS4 TRIS3 TRIS2 TRIS1 TRIS0
--11 1111 --11 1111
Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used for A/D conversion.
Note 1: These registers can be addressed from either bank.
2: The SCL (GP7) and SDA (GP6) bits are unimplemented on the PIC12C671/672 and read as ’0’.
Acquire
ADON = 0
ADON = 0?
GO = 0?
A/D Clock
GO = 0
ADIF = 0
Abort Conversion
SLEEP
Power-down A/D
Wait 2 TAD
Wake-up
Ye s
No
Ye s
No
No
Ye s
Finish Conversion
GO = 0
ADIF = 1
Device in
No
Ye s
Finish Conversion
GO = 0
ADIF = 1
Wait 2 TAD
Stay in Sleep
Selected Channel
= RC?
SLEEP
No
Ye s
Instruction?
Start of A/D
Conversion Delayed
1 Instruction Cycle
From Sleep?
Power-down A/D
Ye s
No
Wait 2 TAD
Finish Conversion
GO = 0
ADIF = 1
SLEEP?